Photonics Research, Volume. 13, Issue 2, 497(2025)

Silicon photonics convolution accelerator based on coherent chips with sub-1 pJ/MAC power consumption

Ying Zhu1, Lu Xu1, Xin Hua1, Kailai Liu2, Yifan Liu1, Ming Luo2, Jia Liu1, Ziyue Dang1, Ye Liu1, Min Liu1, Hongguang Zhang1, Daigao Chen1, Lei Wang3, Xi Xiao1,3、*, and Shaohua Yu3
Author Affiliations
  • 1National Information Optoelectronic Innovation Center, China Information and Communication Technologies Group Corporation (CICT), Wuhan 430074, China
  • 2State Key Laboratory of Optical Communication Technologies and Networks, China Information and Communication Technologies Group Corporation (CICT), Wuhan 430074, China
  • 3Peng Cheng Laboratory, Shenzhen 518055, China
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    Figures & Tables(11)
    SiPh-CA conceptual diagram.
    SiPh IC-TROSA. (a) The sub-silicon photonic coherent transceiver structure, in which only the devices labeled with dark colors function. (b) The microscope image of a silicon photonic coherent transceiver chip. (c) The highly compact SiPh IC-TROSA integrates a silicon coherent transceiver chip, a driver chip, and two TIA chips inside.
    Experimental diagram. AWG, arbitrary waveform generator; ICT, integration coherent transmitter; EDFA, erbium-doped fiber amplifier; PC, polarization controller; PBS, polarization beam splitter; ICR, integration coherent receiver; TIA, trans-impedance amplifier; DSO, digital storage oscilloscope; τ, symbol time width. In them, the ICT and ICR are the photonic integrated chips, which are co-packaged with drivers and TIAs in the printed circuit boards (green solid boxes). After removing the polarization multiplexer from the ICT, the function of the components in the gray dashed box can be realized in only one photonic integrated chip without the EDFA, PC, and PBS.
    Output normalized amplitude spectrum of the SiPh-CA processing 1n⊗1n.
    One trial of the measured results of the SiPh-CA processing Rn⊗Rn.
    Image recognition demonstration. (a) Demonstration for the SiPh-CA processing different NNs. (b) Inference accuracy comparison among the electronic digital computer, SiPh-NA, and SiPh-CA. (c) Confusion matrices for the NNs processed in the SiPh-CA.
    Simulation diagrams. (a) Diagram of the IC-TROSA-based SiPh-NA. (b) Diagram of the sub-IC-TROSA-based SiPh-CA. (c) Diagram of the MZM-based SiPh-CA.
    Simulation results. (a) IC-TROSA-based SiPh-NA output spectrum. (b) IC-TROSA-based SiPh-CA output spectrum. (c) MZM-based SiPh-CA output spectrum.
    Convolution decomposition for large-size tensors of high order.
    • Table 1. Performance of the SiPh-CA for Convolutions

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      Table 1. Performance of the SiPh-CA for Convolutions

      nf0 (GHz)Corrcoef. (1n)Avg. Corrcoef. (Rn)Avg. std.E (Rn)Eff.B (bit)Speed (GOPS)
      410.99890.98560.04874.3632
      80.50.99800.98580.05204.2764
      160.250.99300.97740.06134.03128
      200.20.99280.97750.06124.03160
      320.1250.98710.97000.06913.85256
      400.10.98160.96600.07323.77320
      640.06250.97840.94970.08873.50512
      800.050.97380.93730.09973.33640
      1000.040.96980.92750.10703.22800
      1280.031250.95870.90950.11813.081024
    • Table 2. Cost and Performance Comparison of the SiPh-NA [41] and the SiPh-CA

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      Table 2. Cost and Performance Comparison of the SiPh-NA [41] and the SiPh-CA

       SiPh-NASiPh-CA
      Devices in one cell4 MZMs, 4 drivers,2 MZMs, 2 drivers,
      1 180° hybrid,1 180° hybrid,
      1 BPD, 1 TIA, 1 BPD, 1 TIA
      2 PS, 4 splitters 
      Power consumption with advanced technologies5.616 W4.690 W
      Bit precision3.713.08
      Convolution speed1.024 TOPS1.024 TOPS
      max. MVM matrix10×6410×64
      max. NNFC10,64FC10,64
      Inference accuracy95.78%96.22%
      ScalabilityNN
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    Ying Zhu, Lu Xu, Xin Hua, Kailai Liu, Yifan Liu, Ming Luo, Jia Liu, Ziyue Dang, Ye Liu, Min Liu, Hongguang Zhang, Daigao Chen, Lei Wang, Xi Xiao, Shaohua Yu, "Silicon photonics convolution accelerator based on coherent chips with sub-1 pJ/MAC power consumption," Photonics Res. 13, 497 (2025)

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    Paper Information

    Category: Silicon Photonics

    Received: Jul. 18, 2024

    Accepted: Dec. 2, 2024

    Published Online: Feb. 10, 2025

    The Author Email: Xi Xiao (xiaoxi@noeic.com)

    DOI:10.1364/PRJ.536939

    CSTR:32188.14.PRJ.536939

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