Photonics Research, Volume. 13, Issue 2, 497(2025)

Silicon photonics convolution accelerator based on coherent chips with sub-1 pJ/MAC power consumption

Ying Zhu1, Lu Xu1, Xin Hua1, Kailai Liu2, Yifan Liu1, Ming Luo2, Jia Liu1, Ziyue Dang1, Ye Liu1, Min Liu1, Hongguang Zhang1, Daigao Chen1, Lei Wang3, Xi Xiao1,3、*, and Shaohua Yu3
Author Affiliations
  • 1National Information Optoelectronic Innovation Center, China Information and Communication Technologies Group Corporation (CICT), Wuhan 430074, China
  • 2State Key Laboratory of Optical Communication Technologies and Networks, China Information and Communication Technologies Group Corporation (CICT), Wuhan 430074, China
  • 3Peng Cheng Laboratory, Shenzhen 518055, China
  • show less
    Cited By

    Article index updated: Sep. 22, 2025

    Citation counts are provided from Web of Science. The counts may vary by service, and are reliant on the availability of their data.
    The article is cited by 2 article(s) from Web of Science.
    The article is cited by 1 article(s) CLP online library. (Some content might be in Chinese.)
    Tools

    Get Citation

    Copy Citation Text

    Ying Zhu, Lu Xu, Xin Hua, Kailai Liu, Yifan Liu, Ming Luo, Jia Liu, Ziyue Dang, Ye Liu, Min Liu, Hongguang Zhang, Daigao Chen, Lei Wang, Xi Xiao, Shaohua Yu, "Silicon photonics convolution accelerator based on coherent chips with sub-1 pJ/MAC power consumption," Photonics Res. 13, 497 (2025)

    Download Citation

    EndNote(RIS)BibTexPlain Text
    Save article for my favorites
    Paper Information

    Category: Silicon Photonics

    Received: Jul. 18, 2024

    Accepted: Dec. 2, 2024

    Published Online: Feb. 10, 2025

    The Author Email: Xi Xiao (xiaoxi@noeic.com)

    DOI:10.1364/PRJ.536939

    CSTR:32188.14.PRJ.536939

    Topics