Fig. 1. Receiver architecture including AFE, SAR-ADC, DSP, and CDR.

Fig. 2. AFE architecture consists of termination and 2 stages of TAS cascading TIS CTLE.

Fig. 3. (Color online) (a) Simulated frequency response of the channel loss and different combinations of the high-pass, source degeneration and peaking. (b) Pulse response of high-pass. (c) Pulse response of the combination of the high-pass and source degeneration. (d) Pulse response of the combination of high-pass, source degeneration and peaking.

Fig. 4. (a) Conventional T-coil. (b) Proposed T-coil. (c) 2-port model of proposed T-coil.

Fig. 5. (Color online) Group delay of proposed termination by adjusting damping factor.

Fig. 6. (Color online) (a) S21 and (b) S11 of proposed termination and conventional termination.

Fig. 7. (Color online) (a) Proposed TAS stage design and (b) small signal modal of proposed TAS stage. (c) Gain of TAS stage with the degeneration capacitance tuning and (d) with the high-pass filter resistance and capacitance tuning.

Fig. 8. (Color online) (a) Proposed TIS stage. (b) Small signal model of TIS stage. (c) Gain of TIS stage with the loading capacitance tuning. (d) The total tuning options of proposed AFE.

Fig. 9. (Color online) (a) Normalized signal power, (b) normalized noise power, (c) SNR, and (d) SER by simulation with equalization control code sweeping.

Fig. 10. (Color online) Die photograph.

Fig. 11. (Color online) (a) Tested AFE Gain w/ different equalization control configuration. (b) and (c) Eye diagram after digital equalization with different channel.