Journal of Semiconductors, Volume. 46, Issue 3, 032301(2025)
Achieving over 95% yield of sub-1 ppm BER with retention over 10 years at 125 °C and endurance of 1 × 1012 cycles towards automotive non-volatile RAM applications
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Fig. 1. (Color online) (a) Layout of the 4 Mb eMRAM chip. (b) TEM cross section of the eMRAM array. (c) Storage element of magnetic tunnel junction (MTJ) stack layer illustration.
Fig. 2. (Color online) (a) MTJ device RP and RAP distribution in the representative test key structure across wafer for MTJ stack A and B. (b) TMR/RP_CV for MTJ stack A and B.
Fig. 3. (Color online) (a) MTJ device resistance versus magnetic field (RH) loop averaged over 10 k sub-array devices. (b) WER characteristics comparison for MTJ process Ⅰ and Ⅱ.
Fig. 4. (Color online) Sub-1 ppm array yield improvement of 4 Mb eMRAM chip across wafer through MTJ materials and process engineering.
Fig. 5. (Color online) Read shmoo plot as a function of read conditions and temperature. Reliable read operations are obtained at 20 ns across temperature of −40 to 125 °C.
Fig. 6. (Color online) (a) MTJ endurance progress through MTJ process and design optimization. (b) MTJ breakdown voltage improvement with MTJ barrier process engineering.
Fig. 7. (Color online) (a) Temperature dependence of thermal stability factor in 4 Mb eMRAM chip across wafer. (b) Endurance cycles at target sub-1 ppm BER as a function of voltage applied with power law fitting.
Fig. 8. (Color online) Package parts of 4 Mb chip retention failure rate (ppm) under applied external magnetic field and angle of incidence.
Table 1. MTJ performance comparisons with the previous literatures.
View tableView in ArticleTable 1. MTJ performance comparisons with the previous literatures.
Parameter Ref. [ 12 ]Ref. [ 13 ]Ref. [ 16 ]Ref. [ 8 ]This work Operating temperature (°C) −40–125 −40–85 −40–125 −40–150 −40–125 Memory density 16 Mb 16 Mb Mb range 32 Mb 4 Mb Read speed (ns) 15 40 NA NA 20 Write speed (ns) 100 160 20 50 20 Endurance (cycle) 1 × 1012 1 × 1014 1 × 1012 1 × 106 1 × 1012 Retention 10 years@150 °C 10 years@89 °C 10 sec@125 °C 10 years@225 °C 10 years@125 °C Array yield@sub-1 ppm (w/o ECC & repair) (%) NA NA NA 50–70 95
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Dinggui Zeng, Fantao Meng, Ruofei Chen, Yang Gao, Yihui Sun, Junlu Gong, Yongzhao Peng, Qijun Guo, Zhixiao Deng, Weiming He, Baoyu Xiong, Jia Hou, Jichao Li, Wei Fang, Qiang Dai, Yaohua Wang, Shikun He. Achieving over 95% yield of sub-1 ppm BER with retention over 10 years at 125 °C and endurance of 1 × 1012 cycles towards automotive non-volatile RAM applications[J]. Journal of Semiconductors, 2025, 46(3): 032301
Paper Information
Category: Research Articles
Received: Sep. 19, 2024
Accepted: --
Published Online: Apr. 27, 2025
The Author Email: Dinggui Zeng (DGZeng), Shikun He (SKHe)
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