Fig. 1. The impact of offset voltage on data transmission

Fig. 2. The overall structure of the high speed channel

Fig. 3. Preamplifier circuit

Fig. 4. Judgment comparison circuit

Fig. 5. Simulation results of high-speed comparator

Fig. 6. Calibration comparator circuit

Fig. 7. Circuit of programmable current source

Fig. 8. Diagram of calibration current feedback

Fig. 9. Monte-Carlo simulation result of calibration current

Fig. 10. Flowchart of offset calibration algorithm

Fig. 11. Simulation results of offset calibration

Fig. 12. Layout of high‑speed channel

Fig. 13. Results of offset voltage distribution before and after offset calibration

Fig. 14. Output eye diagram of high‑speed channel