Frontiers of Optoelectronics, Volume. 6, Issue 3, 327(2013)

Ground bounce noise reduction aware combinational multi threshold CMOS circuits for nanoscale CMOS multiplier

Bipin Kumar VERMA*, Shyam Babu SINGH, and Shyam AKASHE
Author Affiliations
  • Department of Electronics and Communication Engineering, ITM University, Gwalior (M.P.) 474001, India
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    Bipin Kumar VERMA, Shyam Babu SINGH, Shyam AKASHE. Ground bounce noise reduction aware combinational multi threshold CMOS circuits for nanoscale CMOS multiplier[J]. Frontiers of Optoelectronics, 2013, 6(3): 327

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    Paper Information

    Category: RESEARCH ARTICLE

    Received: Apr. 10, 2013

    Accepted: Jun. 28, 2013

    Published Online: Mar. 3, 2014

    The Author Email: Bipin Kumar VERMA (bipinverma05@gmail.com)

    DOI:10.1007/s12200-013-0328-8

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