[1] Quirk M, Serda J[M]. Semiconductor manufacturing technology, 367-412(2001).

[2] Erdmann A, Li S K[M]. Optical and EUV lithography: a modeling perspective, 87-123(2023).

[3] Kojima Y, Moniwa A, Maruyama T et al. Novel OPC flow for the trim-mask lithography[J]. Proceedings of SPIE, 8441, 84410I(2012).

[4] Vallishayee R, Orszag S, Barouch E. Optimization of stepper parameters and their influence on OPC[J]. Proceedings of SPIE, 2726, 660-669(1996).

[5] Liao L F, Li S K, Zhang Z N et al. Research on source and mask optimization[J]. Laser & Optoelectronics Progress, 59, 0922010(2022).

[6] Granik Y. Fast pixel-based mask optimization for inverse lithography[J]. Journal of Micro/Nanolithography, MEMS, and MOEMS, 5, 043002(2006).

[7] Socha R, Shi X L, LeHoty D. Simultaneous source mask optimization (SMO)[J]. Proceedings of SPIE, 5853, 180-193(2005).

[8] Yu J C, Yu P C. Gradient-based fast source mask optimization (SMO)[J]. Proceedings of SPIE, 7973, 797320(2011).

[9] Chen G D, Zhang Z N, Li S K et al. Study on deep ultraviolet computational lithography techniques[J]. Laser & Optoelectronics Progress, 59, 0922007(2022).

[10] Ma X, Zhang S E, Pan Y H et al. Research and progress of computational lithography[J]. Laser & Optoelectronics Progress, 59, 0922008(2022).

[11] Rosenbluth A E, Seong N. Global optimization of the illumination distribution to maximize integrated process window[J]. Proceedings of SPIE, 6154, 61540H(2006).

[12] Lai K, Rosenbluth A E, Bagheri S et al. Experimental result and simulation analysis for the use of pixelated illumination from source mask optimization for 22 nm logic lithography process[J]. Proceedings of SPIE, 7274, 72740A(2009).

[13] Melville D, Rosenbluth A E, Tian K H et al. Demonstrating the benefits of source-mask optimization and enabling technologies through experiment and simulations[J]. Proceedings of SPIE, 7640, 764006(2010).

[14] Zhang D Q, Chua G S, Foong Y M et al. Source mask optimization methodology (SMO) and application to real full chip optical proximity correction[J]. Proceedings of SPIE, 8326, 83261V(2012).

[15] Pei J, Shao F, ElSewefy O et al. Compatibility of optimized source over design changes in the foundry environment[J]. Proceedings of SPIE, 8683, 86831M(2013).

[16] Tian K H, Fakhry M, Dave A et al. Applicability of global source mask optimization to 22/20 nm node and beyond[J]. Proceedings of SPIE, 7973, 79730C(2011).

[17] Rosenbluth A E, Bukofsky S J, Hibbs M S et al. Optimum mask and source patterns to print a given shape[J]. Proceedings of SPIE, 4346, 486-502(2001).

[18] Progler C, Conley W, Socha B et al. Layout and source dependent transmission tuning[J]. Proceedings of the SPIE, 5754, 315-326(2005).

[19] Tsai M C, Hsu S, Chen L Q et al. Full-chip source and mask optimization[J]. Proceedings of SPIE, 7973, 79730A(2011).

[20] Liao L F, Li S K, Wang X Z et al. Critical pattern selection method for full-chip source and mask optimization[J]. Optics Express, 28, 20748-20763(2020).

[21] Liao L F, Li S K, Wang X Z et al. Critical pattern selection based on diffraction spectrum analysis for full-chip source mask optimization[J]. Acta Optica Sinica, 40, 2122001(2020).

[22] Yang X H, Li S K, Liao L F et al. Critical pattern selection method for full-chip source and mask optimization based on depth-first search[J]. Acta Optica Sinica, 42, 1022002(2022).

[23] Wong A K K[M]. Optical imaging in projection microlithography(2005).

[24] forFoundation IP. nm to sub-12 nm process nodes[EB/OL]. https:∥www.silvaco.com/products/nangate/FreePDK45_Open_Cell_Library/index.html