The full-chip source-mask optimization (SMO) technique, developed by the collaborative optimization of light sources and masks, plays a crucial role in achieving process nodes of 28 nm and smaller. During full-chip SMO, it is essential to employ graphic selection techniques to identify critical patterns from the mask layout. Based on these critical patterns, an illumination mode suitable for the full-chip mask patterns can be determined. Among the various methods for graphic selection, the spectrum-based approach stands out due to its advantages of not requiring a priori knowledge and offering high reliability. However, existing spectrum-based methods fall short in efficiently selecting the smallest set of critical patterns within the shortest time, leaving room for further improvement in efficiency.

In this paper, we propose a critical pattern selection method based on the breadth-first search algorithm. Based on existing spectrum graphic selection methods, our approach leverages the breadth-first search mechanism to ensure that the nearest leaf nodes to the root node are discovered during the search process. By finding the shortest paths and combining them, we efficiently select all minimal critical pattern groups without traversing the entire critical pattern tree. This approach significantly improves the efficiency of critical pattern selection.

In this paper, ASML's Tachyon Tflex software is used for simulation verification. The simulation employs a set of 60 randomly selected patterns from the 45 nm standard cell library. Under the condition of distinguishing pattern periodicity, our proposed method identifies two minimal critical pattern groups (Fig. 7), whereas Tachyon Tflex software produces only one group (Fig. 8). When various critical metrics are compared under a 10% CD deviation and 5% EL, group A in our method exhibits MEEF and ILS indicators similar to Tachyon Tflex, but with a significantly better depth of focus (DOF) (Table 2). Furthermore, without considering pattern periodicity, our method identifies a total of eight minimal critical pattern groups (Fig. 10), while Tachyon Tflex yields only one group (Fig. 11). In terms of critical metrics under the same CD deviation and EL conditions, G3 in our method outperforms Tachyon Tflex. By focusing on selecting the smallest set of critical patterns, our approach avoids exhaustive searches of the entire pattern tree, resulting in higher efficiency compared to depth-first search-based techniques.

This paper proposes a critical pattern selection method for full-chip SMO based on breadth-first search. Leveraging the principles of breadth-first search, our method efficiently identifies critical patterns for full-chip SMO. Using a test pattern set extracted from the 45 nm standard cell library, we conduct simulation analyses by means of commercial computational lithography software Tachyon Tflex and compare the results with Tachyon Tflex. The simulation results demonstrate that our proposed method achieves a superior process window compared to Tachyon Tflex. By employing depth-first search, we avoid exhaustive searches of the entire pattern tree, ensuring that the first critical pattern group selected contains the fewest patterns. Utilizing breadth-first search, our method rapidly identifies all minimal critical pattern groups, simultaneously minimizing the number of critical patterns while allowing for comparative analysis to select critical pattern groups with larger process windows.