Microelectronics, Volume. 52, Issue 2, 334(2022)

A Key Measurement Technique of High Speed ADC

ZHANG Lin1,2, QI Feitao1,2, LIU Tao1,2, ZHU Beili1,2, LIU Hainan1,2, TENG Rui1,2, LI Bo1,2, ZHAO Fazhan1,2, LUO Jiajun1,2, and HAN Zhengsheng1,2,3
Author Affiliations
  • 1[in Chinese]
  • 2[in Chinese]
  • 3[in Chinese]
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    References(6)

    [1] [1] 1241-2010, IEEE standard for terminology and test methods for analog-to-digital converters [S]. IEEE, 2011.

    [2] [2] PETRICEVIC S J, MIHAILOVIC P, BARJAKTAROVIC M, et al. High input impedance ADC driver with error compensation [C]// 29th MIEL. Belgrade, Serbia. 2014: 463-465.

    [3] [3] ZHOU G, WU J. Hardware design of data acquisition and processing of digital IF receiver [C]// CECNet. Yichang, China. 2012: 2613-2615.

    [4] [4] PAWAR R R, WAGH P A, DEOSARKAR S B. Distribution transformer monitoring system using internet of things [C]// ICCIDS. Chennai, India. 2017: 1-4.

    [5] [5] ZHANG Q, CHEN Y Z, SU Y, et al. A testing system for high speed multi-channel ADC with LVDS data output based on FPGA [C]// ICSICT. Guilin, China. 2014: 1-3.

    [6] [6] BI S J, LV Y X. Analysis of sampling clock jitter effect on the SNR of two RF sampling receivers [C]// ICCP. Jiuzhai, China. 2013: 394-397.

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    ZHANG Lin, QI Feitao, LIU Tao, ZHU Beili, LIU Hainan, TENG Rui, LI Bo, ZHAO Fazhan, LUO Jiajun, HAN Zhengsheng. A Key Measurement Technique of High Speed ADC[J]. Microelectronics, 2022, 52(2): 334

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    Paper Information

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    Received: Jan. 27, 2022

    Accepted: --

    Published Online: Jan. 16, 2023

    The Author Email:

    DOI:10.13911/j.cnki.1004-3365.zjea015

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