Fig. 1. Process of voltage-to-digital conversion by the voltage-domain single-slope-tyep ADC

Fig. 2. System architecture of the time-domain single-slope-type ADC （ATDC）

Fig. 3. Process of the voltage-time conversion during the reference voltage rise ramp by the ATDC

Fig. 4. Process of the voltage-time conversion during the reference voltage drop ramp by the ATDC

Fig. 5. TDC Structure of the TDC

Fig. 6. Distribution of the CARRY4 chains

Fig. 7. Principle of measurement with the TDC delay chains

Fig. 8. Principle of the TDC delay chain test platform

Fig. 9. Test platform for the TDC delay chains

Fig. 10. Test results for the TDC code density

Fig. 11. Measurement results of a fixed delay signal obtained with the TDC

Fig. 12. Nonlinear test results by the ATDC （after calibration）

Fig. 13. Test results of the DC characteristics by the ATDC （before calibration）

Fig. 14. Test results of the DC characteristics by the ATDC （after calibration）

Fig. 15. Spectrum of a sinusoidal signal with a frequency of 12.5 MHz sampled by the ATDC

Fig. 16. Spectrum of a sinusoidal signal with a frequency of 50 MHz sampled by the ATDC

Fig. 17. Hardware circuits subject to time-domain ADC （ATDC） testing

Fig. 18. Optical structures subject to time-domain ADC （ATDC） testing

Fig. 19. Target data at a distance of 100 m sampled by the ADC08060

Fig. 20. Target data at a distance of 100 m sampled by the ATDC

Fig. 21. Target data at a distance of 500 m sampled by the ADC08060

Fig. 22. Target data at a distance of 500 m sampled by the ADC

Fig. 23. Echo signals from the laser ranging system sampled by the ATDC