In response to the design challenges engendered by the necessity to balance power consumption，volume，and cost in the system design of photoelectric sensors such as lidar and laser ranging，a time-to-digital conversion （TDC） circuit is constructed through the employment of a low-cost Xilinx Spartan 6 FPGA，and a time-domain single-slope-type analog-to-digital converter （ADC） with a sampling rate of 1.25×10⁸/s and an 8-bit resolution is attained.The actual measurement demonstrates that this time-domain ADC exhibits good linearity after calibration：differential nonlinearity （DNL） ［-0.49，0.62］ LSB，integral nonlinearity Least Significant Bit （INL）［-0.98，0.74］ LSB.The highest effective bit reaches 6.2 bits，and the measurement range is ［0.47，2.7］ V.It is ascertained that only 13% of the FPGA SLICE is occupied.This time-domain ADC exploits the high-precision clock source CDCM61004 （125 MHz，RMS Jitter<1 ps） as the system clock.The actual measurement manifests that when sampling a high-frequency signal of 50 MHz，the effective bit could reach 5.8 bits.When tested and applied in the laser ranging sensor，the time-domain ADC is capable of collecting the echo signals of the laser pulses and simultaneously obtaining the amplitude and time information of the echo signals，achieving a flexible and compact system design.