Journal of Semiconductors, Volume. 41, Issue 10, 102105(2020)
Design, modelling, and simulation of a floating gate transistor with a novel security feature
Fig. 1. (Color online) A MOPNS under the influence of small negative voltage applied to its gate.
Fig. 2. (Color online) The upward band bending in energy band diagram when a small negative voltage is applied to the gate of a MOPNS.
Fig. 3. (Color online) Graphical representation of charge density, electric field and electric potential of a MOPNS.
Fig. 5. (Color online) Comparison between the extracted model and simulation results (for HF and LF) of normalized
Fig. 6. (Color online) Comparison of HF
Fig. 8. (Color online) Comparison of HF
Fig. 9. (Color online) Comparison between
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H. Zandipour, M. Madani. Design, modelling, and simulation of a floating gate transistor with a novel security feature[J]. Journal of Semiconductors, 2020, 41(10): 102105
Category: Articles
Received: Mar. 2, 2020
Accepted: --
Published Online: Sep. 10, 2021
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