Journal of Semiconductors, Volume. 41, Issue 10, 102105(2020)

Design, modelling, and simulation of a floating gate transistor with a novel security feature

H. Zandipour1 and M. Madani2
Author Affiliations
  • 1Department of Physics, Georgia Southern University, Savannah, GA 31419, USA
  • 2Department of Electrical Engineering, University of Louisiana at Lafayette, Lafayette, LA 70504, USA
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    Figures & Tables(9)
    (Color online) A MOPNS under the influence of small negative voltage applied to its gate.
    (Color online) The upward band bending in energy band diagram when a small negative voltage is applied to the gate of a MOPNS.
    (Color online) Graphical representation of charge density, electric field and electric potential of a MOPNS.
    (Color online) Donor concentration of a simulated MOPNS.
    (Color online) Comparison between the extracted model and simulation results (for HF and LF) of normalized C–V curves for the MOPNS.
    (Color online) Comparison of HF C–V curves of the FG MOPNS and FG MOS with P-type substrate.
    (Color online) Donor concentration of a MOPNS transistor.
    (Color online) Comparison of HF C–V curve of the FG MOPNS with three different dopant concentrations for the oppositely doped region (N-type) when the dopant concentration of the P-type region is constant.
    (Color online) Comparison between I–V characteristics of FG MOPNS and FG MOS (P-type).
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    H. Zandipour, M. Madani. Design, modelling, and simulation of a floating gate transistor with a novel security feature[J]. Journal of Semiconductors, 2020, 41(10): 102105

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    Paper Information

    Category: Articles

    Received: Mar. 2, 2020

    Accepted: --

    Published Online: Sep. 10, 2021

    The Author Email:

    DOI:10.1088/1674-4926/41/10/102105

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