Electronics and Packaging, Volume. 25, Issue 7, 70103(2025)
Regulation Study of Stress Buffer Layer on the Internal Stress and Reliability of Glass Substrate Hole-Filling Structures
[3] [3] FU S, YANG Z C, LI J T. Progress of high strength and high thermal conductivity Si3N4 ceramics for power module packaging[J]. Journal of Inorganic Materials, 2023, 38(10): 1117.
[4] [4] KHOONG L E, TAN Y M, LAM Y C. Overview on fabrication of three-dimensional structures in multi-layer ceramic substrate[J]. Journal of the European Ceramic Society, 2010, 30(10): 1973-1987.
[5] [5] LAI Y Y, PAN K, PARK S. Thermo-mechanical reliability of glass substrate and through glass vias (TGV): a comprehensive review[J]. Microelectronics Reliability, 2024, 161: 115477.
[6] [6] PAWAR K, DIXIT P. A critical review of copper electroless deposition on glass substrates for microsystems packaging applications[J]. Surface Engineering, 2022, 38(6): 576-617.
[9] [9] AHMED O, JALILVAND G, POLLARD S, et al. The interfacial reliability of through-glass vias for 2.5D integrated circuits[J]. Microelectronics International, 2020, 37(4): 181-188.
[10] [10] AHMED O, OKORO C, POLLARD S, et al. The effect of materials and design on the reliability of through-glass vias for 2.5D integrated circuits: a numerical study[J]. Multidiscipline Modeling in Materials and Structures, 2020, 17(2): 451-464.
[11] [11] OKORO C, JAYARAMAN S, POLLARD S. Understanding and eliminating thermo-mechanically induced radial cracks in fully metallized through-glass via (TGV) substrates[J]. Microelectronics Reliability, 2021, 120: 114092.
[12] [12] SHIH M, CHEN K R, LEE T, et al. FE simulation model for warpage evaluation of glass interposer substrate packages[J]. IEEE Transactions on Components, Packaging and Manufacturing Technology, 2021, 11(4): 690-696.
[14] [14] CHANG Y H, LIN Y M, LEE C Y, et al. Through glass via (TGV) copper metallization and its microstructure modification[J]. Journal of Materials Research and Technology, 2024, 31: 1008-1016.
[16] [16] ONITAKE S, INOUE K, TAKAYAMA M, et al. TGV (thru-glass via) metallization by direct Cu plating on glass[C]//2016 IEEE 66th Electronic Components and Technology Conference (ECTC), Las Vegas, NV, USA, 2016: 1316-1321.
[17] [17] LIU X, CHEN Q, DIXIT P, et al. Failure mechanisms and optimum design for electroplated copper through-silicon vias (TSV)[C]//2009 59th Electronic Components and Technology Conference, San Diego, CA, 2009: 624-629.
Get Citation
Copy Citation Text
WANG Zhanbo, ZHANG Zexi, YANG Bin, GUO Xu, YANG Guannan, ZHANG Yu, HUANG Guanghan, CUI Chengqiang. Regulation Study of Stress Buffer Layer on the Internal Stress and Reliability of Glass Substrate Hole-Filling Structures[J]. Electronics and Packaging, 2025, 25(7): 70103
Special Issue:
Received: Feb. 28, 2025
Accepted: Aug. 26, 2025
Published Online: Aug. 26, 2025
The Author Email: YANG Guannan (ygn@gdut.edu.cn)
