Acta Optica Sinica, Volume. 44, Issue 23, 2304001(2024)

High-Performance 40×30 Single-Photon Avalanche Diode dTOF Sensor

Haijie Zuo, Zhenxing Yang, Xinxia Li, Zhiting Hu, Zhengpeng Chen, Zhongyao Yang, Hongzhi Lin, Zhiyuan Chen, Jingtu Lin, Chao Liu, Liang Gao, Weichao Xu, Zhenghan Qiu, Bo Yi, Baoming Zhu, Fengming Liu, Shaoqi Feng, Liufeng Yang, Na Yu, Yufei Zou, Yuchen Guo, and Shen Wang*
Author Affiliations
  • VisionICs Microelectronics Technology Co., Ltd., Nanjing 210032, Jiangsu , China
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    Objective

    Single-photon avalanche diodes (SPADs) are in high demand for various applications, particularly in mobile devices, robotics, virtual reality/augmented reality (VR/AR), and autonomous driving. Unlike conventional CMOS image sensors, SPADs operate in a high breakdown voltage (BV) mode to achieve high gain. However, high BV leads to increased power consumption, which is undesirable for mobile applications. A high photon detection efficiency (PDE) is critical for extending the detection range of dTOF systems and minimizing transmitter power consumption. In addition, maintaining stable SPAD performance across different temperatures is essential due to the complex environments in which they are used. We present the design and characterization of a high-performance SPAD array sensor, VA6320, suitable for various applications such as mobile and VR/AR.

    Method

    The sensor described here is manufactured using a 3D stacking process with Cu—Cu hybrid bonding. The SPAD wafer is fabricated using a 55 nm backside illumination (BSI) process, while the ASIC wafer is fabricated using a 40 nm logic process. BSI CMOS image sensor technology with 3D stacking is applied to SPAD technology to enhance PDE, complemented by optical structures such as anti-reflection coating (ARC) and pyramid surface for diffraction (PSD). In addition, the design of the top tier is customized to achieve high performance, including low breakdown voltage, low temperature coefficient, minimal jitter, reduced crosstalk, and low afterpulsing.

    Results and Discussions

    In this study, a 20 μm pitch SPAD is designed. Thanks to a special implant design, a low breakdown voltage of 16.54 V at room temperature and a low temperature coefficient of 18 mV/℃ are achieved (Fig. 5). The introduction of anti-reflection layers, microlenses, backside scattering structures, and bottom reflectors contributes to high quantum efficiency and improved photon detection efficiency, with PDE values of 28.8% at 905 nm and 22.4% at 940 nm. The temperature dependence of the dark count rate (DCR) is characterized (Fig. 7), showing an exponential increase with temperature between -20 and 80 ℃. The DCR doubles every 20 ℃, suggesting that the DCR may be due to trap-assisted tunneling. The dead time is 33 ns at room temperature and decreases with temperature (Fig. 8), likely due to the temperature dependence of the recharge current. The full width at half maximum (FWHM) of SPAD timing jitter is about 350 ps (Fig. 9), with an approximately one-nanosecond diffusion tail, indicating that the epitaxial layer is not fully depleted. The timing jitter remains stable across different temperatures. Figure 10 shows the distribution of avalanche events collected under dark conditions, with excessive avalanche events within 0?500 ns considered as afterpulses. The afterpulsing rate is estimated at 0.35% with a 30 ns dead time. Benefiting from excellent optical and electrical isolation due to deep trench isolation (DTI), the device shows low crosstalk of 0.16% for overbias Vex of 2V (Fig. 11). Crosstalk increases with excess voltage and temperature, which is attributed to the PDE’s temperature dependence. Figure 12 shows a light emission distribution of the avalanche process from a region of pixels with the center pixel activated, indicating breakdown mainly occurs in the central PN junction rather than at the edges. Figure 14 shows a gesture point cloud image captured by the SPAD sensor using a high-frame-rate global shutter method.

    Conclusions

    We report the design and performance characterization of a new type of BSI SPAD. The sensor is manufactured using a 3D stacking process with Cu—Cu hybrid bonding, where the top tier is fabricated using a 55 nm logic process and the bottom tier is fabricated using a 40 nm logic process. By optimizing the device structure and doping to reduce breakdown voltage and its temperature coefficient, the breakdown voltage is 16.54 V at room temperature, and the temperature coefficient is as low as 18 mV/℃. The integration of anti-reflection layers, microlenses, backside scattering structures, and bottom reflectors achieves high quantum efficiency and improved photon detection efficiency, with a PDE of 28.8% at 905 nm and 22.4% at 940 nm. Deep trench isolation enhances electrical and optical isolation, with pixel crosstalk below 0.5%, demonstrating good performance. The SPAD sensor with a 40×30 pixel array successfully provides high frame rate spatial 2D depth maps using a global shutter method, offering an industrial solution for dTOF ranging, with potential applications in mobile phones, camera focusing, AR/VR, and more.

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    Haijie Zuo, Zhenxing Yang, Xinxia Li, Zhiting Hu, Zhengpeng Chen, Zhongyao Yang, Hongzhi Lin, Zhiyuan Chen, Jingtu Lin, Chao Liu, Liang Gao, Weichao Xu, Zhenghan Qiu, Bo Yi, Baoming Zhu, Fengming Liu, Shaoqi Feng, Liufeng Yang, Na Yu, Yufei Zou, Yuchen Guo, Shen Wang. High-Performance 40×30 Single-Photon Avalanche Diode dTOF Sensor[J]. Acta Optica Sinica, 2024, 44(23): 2304001

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    Paper Information

    Category: Detectors

    Received: Jul. 17, 2024

    Accepted: Sep. 2, 2024

    Published Online: Dec. 16, 2024

    The Author Email: Wang Shen (shen.wang@evisionics.com)

    DOI:10.3788/AOS241318

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