Microelectronics, Volume. 54, Issue 1, 165(2024)

A Failure Mechanism and Its Optimization Method for Flip-Chip Package Micropore

CHEN Zhaohui1, ZHANG Chi1, XU Peng1, ZENG Wei2, WU Jiajin2, SU Wei2, CHEN Songjiao2, and WANG Qiang2
Author Affiliations
  • 1[in Chinese]
  • 2[in Chinese]
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    References(4)

    [1] [1] ZHU Q S, GAO F, MA H C, et al. Failure behavior of flip chip solder joint under coupling condition of thermal cycling and electrical current [J]. Journal of Materials Science: Materials in Electronics, 2018, 29(6): 5025-5033.

    [3] [3] ZHAI X M, GUAN C Y, LI Y F, et al. Effect of different soldering temperatures on the solder joints of flip-chip LED chips [J]. Journal of Electronic Materials, 2021, 50(3): 796-807.

    [14] [14] WU L, HAN X, SHAO C, et al. Thermal fatigue modelling and simulation of flip chip component solder joints under cyclic thermal loading [J]. Energies, 2019, 12(12): 2391.

    [18] [18] LEE W, NGUYEN L, SELVADURAY G S. Solder joint fatigue models: review and applicability to chip scale packages [J]. Microelectronics Reliability, 2000, 40(2): 231-244.

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    CHEN Zhaohui, ZHANG Chi, XU Peng, ZENG Wei, WU Jiajin, SU Wei, CHEN Songjiao, WANG Qiang. A Failure Mechanism and Its Optimization Method for Flip-Chip Package Micropore[J]. Microelectronics, 2024, 54(1): 165

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    Paper Information

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    Received: Sep. 4, 2023

    Accepted: --

    Published Online: Aug. 7, 2024

    The Author Email:

    DOI:10.13911/j.cnki.1004-3365.230344

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