1State Key Laboratory of Materials for Integrated Circuits, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200050, China
2University of Chinese Academy of Sciences, Beijing 100049, China
3School of Microelectronics, Shanghai University, Shanghai 201800, China
4Shanghai Industrial μTechnology Research Institute, Shanghai 201800, China
5Shanghai Mingkun Semiconductor Co., Ltd., Shanghai 201800, China
This paper presents the design, fabrication, and characterization of a high-performance heterogeneous silicon on insulator (SOI)/thin film lithium niobate (TFLN) electro-optical modulator based on wafer-scale direct bonding followed by ion-cut technology. The SOI wafer has been processed by an 8 inch standard fabrication line and cut into 6 inch for direct bonding with TFLN. The hybrid SOI/LN electro-optical modulator operated at the wavelength of 1.55 μm is composed of couplers on the Si layer and a Mach–Zehnder interferometer (MZI) structure on the LN layer. The fabricated device exhibits a stable value of the product of half-wave voltage and length () of around . It shows a good low-frequency electro-optic response flatness and supports 96 Gbit/s data transmission for the NRZ format and 192 Gbit/s data transmission for the PAM-4 format.
【AIGC One Sentence Reading】:High-performance SOI/TFLN electro-optical modulator achieved through wafer-scale bonding, supporting up to 192 Gbit/s data transmission.
【AIGC Short Abstract】:This paper introduces a high-performance electro-optical modulator integrating SOI and TFLN through wafer-scale direct bonding and ion-cut technology. The device, operating at 1.55 μm, features couplers on Si and an MZI on LN, achieving stable VπL of ~2.9 V·cm, good low-frequency response, and supporting up to 192 Gbit/s data transmission.
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1. INTRODUCTION
Photonics integrated circuits (PICs) have generated widespread applications in communications, radar, and electronics, with the advantages of large operating bandwidth and low transmission loss [1,2]. Silicon photonics (SiPh) is considered to be the key candidate for PICs contributing to its compatibility with the standard complementary metal oxide semiconductor (CMOS) manufacturing process used in the microelectronics industry, which enables the promise of realizing compact devices in high volume through the low-cost foundry process [1,2]. Electro-optical modulators (EOMs) are core devices in PICs and silicon-based electric-optical modulators have developed rapidly in the past decade [3–6]. However, silicon-based modulators typically require a high driving voltage for 50 GHz bandwidth and beyond [7] due to the intrinsic properties of silicon materials such as two-photon absorption effect and nonlinearity, which have already limited its further development, demanded of the ever-increasing data capacity [2,8].
Integrating various functional materials onto silicon platforms to enhance the functionality of silicon photonics is a potential solution [9]. The excellent electro-optical properties of lithium niobate make it a good choice for long-haul optical communications [10,11]. The mature preparation of thin film lithium niobate (TFLN) materials with high refractive index contrasts () has greatly reduced the footprint of TFLN-based modulators compared to bulk LN waveguide modulators with low refractive index contrasts () [12–15], which has attracted the attention of industry and academia. Several TFLN Mach–Zehnder modulators (MZMs) with a CMOS-compatible drive voltage () and ultrahigh EO bandwidth () have been demonstrated [16]. Furthermore, a scheme of a hybrid waveguide with TFLN and Si or SiN circuits is proposed, which can promote the development of multi-functional monolithic integration, while supporting good performance [17–28]. Among them, a hybrid silicon and TFLN modulator fabricated by die-to-die wafer bonding has been proposed, which exhibits a of 1.7 V, a 3 dB electro-optic (EO) bandwidth above 70 GHz, and data transmission beyond 100 Gbit/s at the C-band [23]. However, there are few academic modulator reports on exploring wafer-scale bonding fabrication to integrate silicon and lithium niobate [8,23,29–35].
In order to meet the demand for commercial mass production in the future, the research on large-scale integration technology is necessary for the heterogenous photonic platforms. In this work, an electro-optic Mach–Zender modulator operating at the wavelength of 1550 nm is demonstrated by wafer-scale heterogeneous silicon-on-insulator (SOI)/TFLN integration, combining the merits of the excellent electro-optical properties of lithium niobate materials and the large-scale fabrication of SiPh.
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2. DEVICE DESIGN AND SIMULATION
Figure 1(a) shows the schematic of the hybrid MZM, which consists of silicon-based (blue) gratings for input and output light, vertical adiabatic couplers (VACs) composed of an inverted taper silicon and 200 nm etch straight LN (green) ridge waveguide for light transmission between the silicon layer and LN layer, LN-based multimode interference (MMI) couplers for splitting and combining beams, and modulation arms composed of LN ridge waveguides and aluminum electrodes (yellow) in a coplanar waveguide configuration, being driven by RF electrodes operated in a natural push-pull configuration. The cross-section of the hybrid Si/LN MZM is shown in Fig. 1(b). We employ wafer-scale integration of TFLN with a patterned SOI wafer. The stack was composed of a silicon handle layer, a box layer with a thickness of 2 μm, 220 nm silicon layer, 160 nm oxide layer, 600 nm thick X-cut LN, 1.6 μm oxide cladding, and 1.1 μm Al layer.
Figure 1.(a) The schematic of the designed hybrid Si/LN MZM. (b) The cross-section of the hybrid Si/LN MZM showing different materials of the stack and their vertical dimensions.
Wafer-scale direct bonding based on ion-cut technology is employed to achieve the integration of silicon circuits and lithium niobate. And silicon oxide is chosen as the bonding interlayer. Additionally, a comprehensive simulation and optimization process was implemented to reduce MMI and VAC loss. Lastly, the coplanar waveguide (CPW) electrode design was performed to minimize electrode losses while achieving a impedance match as well as index match.
A. Vertical Adiabatic Coupler
The vertical adiabatic coupler is mainly composed of silicon inverse tapers, which transfers the light up and down between the silicon waveguide and LN waveguide. Via this approach, only simple, straight waveguides need to be fabricated in the LN membrane [29], which reduces the challenge of high-precision lithium niobate pattern processing.
The structure and cross-section of the VAC are illustrated in Figs. 2(a) and 2(b). , and are the three parameters that we prioritize to optimize the coupling efficiency of the VAC. Considering the single-mode transmission conditions of the optical mode, was set as 500 nm. was set as 200 nm due to the limitation of the lithography accuracy of the SiPh foundry.
Figure 2.(a) Top view schematic and the optical mode transmission in the VAC. (b) The cross-section and the key dimensions of the VAC. (c) The insertion loss of the VAC as a function of and (d) . (e) Influence of the alignment error on the loss of VACs.
of the LN waveguide was set as 2 μm for greater process robustness of the interlayer alignment process between Si and LN layers. And the insertion losses of the VAC as a function of and are shown in Figs. 2(c) and 2(d), respectively. We also simulated the influence from the alignment error between the LN rib waveguide and Si strip waveguide, shown in Fig. 2(e). The simulation loss of the VAC is kept within 0.05 dB when the alignment error is below 1 μm. In this design, the and the of the VAC were set as 80 μm and 160 nm, corresponding to a simulated insertion loss of 0.02 dB.
B. MMI
For better process robustness, we chose the splitter as a 3 dB splitter and a combiner at both ends of the modulation region, instead of a bidirectional coupler or a Y-branch. Figure 3(a) shows the structure and dimensions of the splitter we designed. In addition, in order to simplify the LN etching process, we sacrificed some of the insertion loss performance and chose straight waveguides as the input and output ports instead of tapered waveguides in conventional designs.
Figure 3.(a) Top view schematic of the 3 dB MMI splitter. (b) The simulated insertion loss of the designed MMI splitter. Inset: simulated mode propagation in the designed MMI splitter at 1550 nm.
The length and width of the multimode region are initially estimated using where is the effective index of the multimode region, is the width of the multimode region, is the number of self-images, and is the wavelength shown in Fig. 3(a). The finite difference time domain (FDTD) method was used for simulation and optimization to obtain the optimal dimensions for optimal transmission. Due to the consideration of the LN processing mentioned earlier, 2 μm wide LN rib waveguides were directly used as the input/output ports coupling light into the multimode region.
In this design, the length and the width of the multimode region were set as 10 μm and 70 μm, respectively. The separation between the output ports of MMI was 2.08 μm to ensure low crosstalk between the two output ports. The simulated insertion loss as a function of wavelength from 1500 nm to 1600 nm for two ports of the is shown in Fig. 3(b). The optimal simulated insertion loss is below 0.2 dB. And the inset picture shows the top-down view of the transmission mode field of the optimized .
C. Modulation Arm
The Pockels effect is mandatory for the linear electro-optical modulation of LN modulators, with the largest EO coefficient along the axis of LN material. In order to realize efficient EO interaction, the coplanar waveguide (CPW) transmission lines are placed beside the LN waveguides to get the electric field direction parallel to the axis of LN. At the same time, TE optical mode is chosen so as to realize the parallelism between the modal polarization and the axis. The simulated TE optical mode profile at one arm of the modulator and the simulated static electric field distribution when 1 V voltage is applied are depicted in Fig. 4(c), which is calculated by the finite element method. The light confined in the LN layer creates strong electro-optic interaction with the applied electric field, causing changes in the refractive index of materials. According to the Pockels effect of crystal, the perturbated effective refractive index in the X-cut LN waveguide is given by [36] where is the electro-optic coefficient along the crystal axis direction (30.8 pm/V), is the extraordinary refractive index of lithium niobate materials (2.137 at a wavelength of 1550 nm), and is the normalized mode overlap integral between the optical filed and RF field, defined as [36] where and are the RF and optical field along the direction, respectively. is the electrode gap. is the applied voltage. The half-wave voltage length product () shows the modulation efficiency of an LN MZM, which is given by [27] where is the effective mode index of the optical signal, and is the free-space wavelength. The factor of two is derived from the natural full push-pull configuration of the device, where the two arms are biased with opposite voltages at the same time, improving the modulation efficiency of the device by a factor of two.
Figure 4.(a) Two-dimensional colormap plot of the versus electrode spacing and etching depth and the schematic of the simulation mode. (b) The mode absorption loss induced by metal versus . (c) The optical mode field and the static electric field distribution in the single arm. Inset: the schematic of the single arm of the designed modulator. (d) and versus thickness of the thin film silicon oxide .
From the above-mentioned discussion, it can be inferred that a smaller electrode spacing is preferred to get higher modulation efficiency, since a stronger electric field is applied on the LN waveguide. In addition, shallow etching of the LN waveguide, with a larger optical mode and more affected by the electric field, also helps to improve the modulation efficiency. Figure 4(a) shows the simulation results of the versus from 3 to 8 μm and from 100 to 500 nm and the corresponding modal structure. It can be seen that smaller and tend to get a lower . However, there is an additional issue of metal absorption loss caused by the electrode being close to the optical mode. We choose 200 nm as the of this design to get an optical mode of appropriate size. As shown in Fig. 4(b), the mode loss is just the opposite situation of the electrode spacing to above. The was set as 6 μm to achieve relatively high modulation efficiency and then we introduce a thin film silicon oxide between the waveguide and the metal electrode to further decline the mode loss, as shown in the inset picture of Fig. 4(c). The simulation results of versus different thicknesses of the thin film silicon oxide are shown in Fig. 4(d). The thinner the silicon oxide layer, the greater the electro-optic overlap integral calculated by Eq. (3); therefore the is lower. Considering the etching process capability of silicon oxide, we chose 300 nm as the thickness of oxide, corresponding to a of .
The CPW in the form of ground-signal-ground (G-S-G) is employed to construct the traveling wave electrodes. The design of the traveling wave electrode must take into account three key factors for high-frequency modulation [33]: (i) microwave loss, mainly including impedance loss of Al electrodes and dielectric loss induced by a substrate; (ii) the matching between the microwave refractive index of the RF signal and the group velocity refractive index of the optical mode; (iii) the matching of the characteristic impedance of the transmission line with the impedance of the load. The theoretical electro-optic response of an LN-based EOM can be calculated by [36] where is the characteristic impedance of the transmission line, is the input impedance of the applied line ( was selected as the design standard of this device), is the attenuation coefficient of the microwave signal and can be obtained from the real part of the propagation constant of the microwave signal, is the length of the transmission line, and is the discrete parameters of light waves and microwaves, defined as where is the frequency of the microwave signal, is the microwave effective index of the microwave signal, is the group velocity refractive index of the optical mode, and is the speed of light in vacuum. The 3 dB electro-optical bandwidth of the EOM is defined as the frequency at which has dropped to half of its DC value. We can see that the bandwidth is basically determined by , and from Eqs. (5) and (6). And the other RF properties are closely related to the electrode structure parameters by further studies on transmission line theory. Figures 5(a) and 5(b) show the finite element simulation values of and versus different and . It should be noted that within the range of electrode sizes considered in this device, the influence of and on can be ignored. For the purpose of simultaneously minimizing the microwave loss coefficient as much as possible and achieving better characteristic impedance matching, we set the and as 14 μm and 1.1 μm, respectively. The of the optical mode is 2.20. Figure 5(c) shows the of this device is around 2.12 versus frequency up to 200 GHz, and the mismatch between the microwave index and the optical group index is below 5%. Additionally, Fig. 5(d) shows the influence of the resistivity of the silicon substrate on the electro-optic response of this device, which is mainly from electrical leakage loss caused by the substrate. And apparently, a wafer with high resistivity is beneficial for achieving higher electro-optic 3 dB bandwidth.
Figure 5.(a) The finite element simulation values of and (b) versus and . (c) The of this device versus frequency up to 200 GHz. (d) The calculated electro-optic response of silicon substrates with different resistivities.
The fabrication process flow of this hybrid SOI/LN modulator is depicted in Fig. 6(a). First, the patterns of the silicon layer, including gratings, single-mode waveguides, and inverted taper structures, were achieved through a standard 180 nm process on an 8 inch SOI wafer with a Si layer thickness of 220 nm and a BOX thickness of 2 μm. Second was oxide cladding deposition and followed by the CMP process to reduce the oxide thickness on top of the Si waveguide to 160 nm. Then the 8 inch SOI wafer was cut into 6 inch and wafer-scale direct bonding followed by ion-cut technology was utilized for the heterogeneous integration, achieving the TFLN with 600 nm thickness. We continued to prepare a shallow etching of 200 nm on TFLN in chip scale by the EBL process and dry etching with a photoresist. Then 1.6 μm thick oxide cladding was deposited by physical vapor deposition (PVD), followed by local etching beside the LN waveguides, leaving an oxide film with a thickness of 300 nm. Finally, Al electrodes were patterned by a standard lift-off process. Figure 6(b) shows the SEM picture of the cross-section of the VAC, which is composed of silicon and LN waveguides. Figure 6(c) shows the SEM picture of the Al electrode pad. Figure 6(d) shows the picture of the fabricated heterogeneous integrated SOI/LN modulator.
Figure 6.(a) The process flow of the proposed integrated SOI/LN modulator: (I) an 8 inch SOI wafer; (II) silicon patterning, oxide deposition, and CMP process; (III) direct bonding followed by ion-cut technology; (IV) LN waveguide formation and oxide deposition; (V) oxide windows opening and metal formation. (b) The SEM picture of the cross-section of Si and LN waveguides. (c) The top-down SEM picture of the local patterned metal. (d) The microscopic picture of the fabricated heterogeneous integrated SOI/LN modulator.
The wafer-scale thin film transfer via ion-cut technology is the most challenging process in the aforementioned flow. Figure 7(a) shows a schematic diagram of the bonding process. First, the surface of the cladding oxide on the SOI wafer must reach a certain level of flatness to meet the following bonding requirements, which poses high requirements for the CMP process of silicon oxide cladding. We tested the steps on the surface with a step tester; the steps below 10 nm on the entire wafer are tolerable for the following bonding process. Meanwhile, by ion implantation, ions were injected into a certain depth inside the lithium niobate wafer to form the implanted defect layer. A charge neutralization system was incorporated at the time of injection to improve the uniformity of the peeled LN film thickness. Before bonding, we chose to perform plasma activation on the wafer surface to improve the bond strength. Then, the ion-implanted LN wafer was bonded to the patterned SOI wafer in an atmospheric environment. Subsequently, the integrated wafer was heated at 200°C for 15 h. During the heating process, ions would diffuse and aggregate inside the wafer, promoting the formation of microcracks and other defects inside the wafer. When the number of defects accumulated to a certain extent, the lithium niobate film peeled off at the injection layer and formed a lithium niobate film on the SOI wafer. It is worthy to mention that the layer between the SOI and LN also plays a role of absorbing the bonding by-products and inhibiting the bond interface defects, which is helpful to obtain a defect-free TFLN.
Figure 7.(a) The flow of the direct bonding process based on ion-cut technology: (I) ion implantation in LN wafer; (II) wafer bonding of LN and SOI wafer; (III) annealing of the integrated wafer; (IV) CMP of LN film surface. (b) The measurement result of LN thin film after CMP. (c) The picture of this integrated SOI/LN wafer.
Afterwards, the peeled lithium niobate film was annealed at higher temperature (550°C for 6 h) to repair lattice damage caused by ion implantation and restore the quality of the TFLN similar to those of the bulk LN, as well as enhancing the bonding strength of the bonding interface. Finally, another CMP process was performed on the lithium niobate film to remove the ion implantation damage layer on the surface, resulting in high-quality lithium niobate film. In addition, the initially stripped lithium niobate film had a large surface roughness and cannot be directly used in the fabrication of the device. By this final CMP process, the preparation of LN thin films with thickness non-uniformity within 603 nm has been achieved, and the film removal amount was around 70 nm. Figure 7(b) shows the thickness measurement of LN film, with an average value of 603 nm. The thickness range of the film can be controlled within 42 nm. Figure 7(c) is the picture of this integrated SOI/LN wafer. During this bonding process, the implantation conditions of lithium niobate and the bonding process between lithium niobate and the SOI wafer were key factors affecting the successful transfer and transfer integrity of lithium niobate thin film. The post-annealing and polishing process of lithium niobate was related to the quality of the prepared lithium niobate thin film.
After the whole device fabrication, the modulation efficiency of this hybrid modulator is measured using a low-frequency triangular wave voltage drive. A triangular wave voltage signal from 10 Hz to 1 MHz is applied on the 5 mm long modulation electrode and is input into an oscilloscope at the same time. The modulated signal is received by a 1 GHz photodiode (PD) and subsequently loaded to the oscilloscope. Figure 8(a) shows the experimental setup for the modulation measurement. The triangular wave driving voltage and measured typical sinusoidal response of the modulated signals are shown in Fig. 8(b). The vertical axis corresponding to the yellow curve is the photoelectric signal received by the detector loaded onto the oscilloscope; the vertical axis corresponding to the green curve is the amplitude of the driving voltage, with a peak to peak value of 10 V. And the horizontal axis is time. It can be seen that the modulated signal does not show an obvious distortion till the frequency of the driving signal is 0.01 kHz. Figure 8(c) summarizes the corresponding value in a boxplot, showing a stable value of around , which is close to the calculated value of . In addition, the stable values from 10 Hz to 1 MHz signal sweep also indicate this fabricated modulator shows a good low-frequency EO response flatness, which may be beneficial from the post-annealing process of the hetero SOI/LN wafer and the localized etching of silicon oxide under the electrode [37,38].
Figure 8.(a) The experimental setup for the modulation measurement. (b) The triangle wave driving voltage and measured typical sinusoidal response of the modulated signals. (c) The corresponding values under the triangular wave driving signals at different frequencies.
The experimental setup for the high-frequency-performance measurement is shown in Fig. 9(a). A 67 GHz performance network analyzer (PNA, Keysight N5227B) is used with a light wave component analyzer (LCA, Keysight N4373E). First, a continuous optical wave of 1550 nm wavelength from the tunable laser is coupled into the hybrid Si/LN modulator through a polarization controller (PC) to ensure TE polarization input. In the meanwhile, the RF modulation signal from PNA is synthesized with the DC voltage by a bias tee (SHF BT65R-B) and then applied to our devices. The modulated optical signal is amplified by EDFA and is received by the LCA. Then it is transformed into RF signals and input to the PNA to measure the EO response.
Figure 9.(a) The experimental setup for the high-frequency-performance measurement. (b) The measured EO response of the modulator and the S11 parameters of the CPW electrodes.
The measured EO response of the modulator and the S11 parameters of the CPW electrodes are shown in Fig. 9(b). It can be seen that the 3 dB bandwidth is above 50 GHz and the reflection of the microwave electrical signal is nearly below within the 3 dB bandwidth region. It should be noted that the SOI wafer with a standard low-resistivity silicon substrate of in this work is the main limitation to the measured 3 dB bandwidth, as shown in the simulation results in Fig. 5(d). We believe that a silicon substrate with high resistivity is expected to get a better bandwidth performance in further study.
For eye diagrams measurement [Fig. 10(a)], the modulated light was input into the sampling scope (Scope, Kesight 1092C RF) rather than LCA after EDFA and the filter. And a pseudorandom sequence (PRS) signal of length produced by the arbitrary waveform generator (AWG, Keysight M8194A) was output through an amplifier (SHF S807C). Subsequently, the amplified RF signal and DC voltage were loaded to the modulators together by a bias tee. In the meantime, an RF signal with the same amplitude was input in the scope for getting the actual electrical peak-to-peak voltage (). All the extinction ratios (ERs) annotated in subsequent images were read directly from the scope.
Figure 10.(a) The experimental setup for the eye diagram measurement. (b) The measured eye diagrams of the device with NRZ format from 36 Gbit/s to 96 Gbit/s and (c) PAM-4 format from 72 Gbit/s to 192 Gbit/s.
Data transmissions using this device were characterized and the results are shown in Fig. 10(b) for the non-return-to-zero (NRZ) modulation format at 36 Gbit/s to 96 Gbit/s, and Fig. 10(c) for the four-level pulse amplitude modulation (PAM-4) format from 72 Gbit/s to 192 Gbit/s. All the cases are applied with a peak-to-peak voltage () of 2.6 V. In addition, the back-to-back (B2B) bit error rates (BERs) from 36 to 64 Gbit/s NRZ signals were further measured. As shown in Fig. 11, at the rate up to 64 Gbit/s, the BERs can still meet the hard-forward error correction threshold at a low received optical power.
Figure 11.Measured B2B BER curves versus the received optical power for NRZ signal at different rates.
In conclusion, we have experimentally demonstrated a high-performance modulator based on wafer-scale heterogeneous SOI/TFLN integration. A wafer-scale direct bonding process followed by ion-cut technology has been employed to integrate 6 inch TFLN with the patterned 6 inch SOI wafer, which has been cut from 8 inch SOI. The fabricated device exhibits a stable of around with a triangular wave signal at 10 Hz, which indicates a good low-frequency EO response flatness to some extent. For data transmission capability, the device supports data rates up to 96 Gbit/s for NRZ signal transmission and 192 Gbit/s for PAM-4 signal transmission. To the best of our knowledge, this work is the first demonstration of a heterogeneous Si/LN electro-optical modulator based on wafer-scale bonding followed by ion-cut technology. In addition, the proposed modulator structure is capable of being integrated with silicon-based Ge photodetectors, further laying the foundation for the heterogeneous integration technology.
Acknowledgment
Acknowledgment. The authors would like to acknowledge the significant fabrication process provided by Shanghai Industrial μTechnology Research Institute (SITRI), Novel Si Integration Technology (NSIT), and Nanzhi Institute Advanced Optoelectronic Integration.
[11] C. Wei, Y. Yu, Z. Wang. Ultra-wideband waveguide-coupled photodiodes heterogeneously integrated on a thin-film lithium niobate platform. Light: Advanced Manufacturing, 4, 263-271(2023).
[15] H. Liu, B. Pan, Y. Huang. Ultra-compact lithium niobate photonic chip for high-capacity and energy-efficient wavelength-division multiplexing transmitters. Light: Advanced Manufacturing, 4, 133-142(2023).