Microelectronics, Volume. 52, Issue 1, 6(2022)

FPGA Design and Implementation of a Large Integer Multiplier with High Speed Pipeline Structure

TU Zhenxing, WANG Xiaolei, DU Gaoming, and LI Zhenmin
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    TU Zhenxing, WANG Xiaolei, DU Gaoming, LI Zhenmin. FPGA Design and Implementation of a Large Integer Multiplier with High Speed Pipeline Structure[J]. Microelectronics, 2022, 52(1): 6

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    Paper Information

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    Received: Mar. 10, 2021

    Accepted: --

    Published Online: Jun. 14, 2022

    The Author Email:

    DOI:10.13911/j.cnki.1004-3365.210095

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