Microelectronics, Volume. 55, Issue 1, 78(2025)

Simulation Study of Single-event Effects in 22 nm FDSOI Devices

HUNAG Kai, AIERKEN Abuduwayiti, BI Jinshun, LIU Xuefei, WANG Gang, LIU Mingqiang, and WANG Degui
Author Affiliations
  • School of Integrated Circuits, Guizhou Normal University, Guiyang 550025, P R China
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    References(15)

    [1] [1] ZHOU H, CUI J W, ZHENG Q W, et al. Reliability of partially-depleted silicon-on-insulator n-channel metal-oxide-semiconductor field-effect transistor under the ionizing radiation environment[J]. Acta Physica Sinica, 2015, 64(8): 086101.

    [2] [2] BARTRA W C, VLADIMIRESCU A, REIS R. Bulk and FDSOI Sub-micron CMOS transistors resilience to single-event transients[C]//IEEE International Conference on Electronics, Circuits, and Systems. Cairo, Egypt. 2015: 133-136.

    [3] [3] WANG K W, ZHANG X Y, LI B, et al. A compact model for single-event transient in fully depleted silicon on insulator MOSFET considering the back-gate voltage based on time-domain components[J]. Electronics, 2022, 11(23): 4022.

    [4] [4] YAGHOBI H R, EYVAZI K, KARAMI M A. Investigation of single-event-transient effects on n+pocket double-gate tunnel FET[J]. Radiation Physics and Chemistry, 2023, 212: 111094.

    [5] [5] CALIENES BARTRA W E, VLADIMIRESCU A, REIS R. FDSOI and bulk CMOS SRAM cell resilience to radiation effects[J]. Microelectronics Reliability, 2016, 64: 152-157.

    [6] [6] SUN Y B, LIU R H, HUANG Q, et al. Analysis of single-event effects in selected BOX-based FDSOI transistor and inverter[J]. Radiation Physics and Chemistry, 2021, 186: 109526.

    [9] [9] YUAN J S, ZHAO Y F, WANG L, et al. 22 nm FDSOI SRAM single event upset simulation analysis[J]. Journal of Physics: Conference Series, 2021, 1920(1): 012069.

    [10] [10] TANG D, LI Y H, ZHANG G H, et al. Single event upset sensitivity of 45 nm FDSOI and SOI FinFET SRAM[J]. Science China Technological Sciences, 2013, 56(3): 780-785.

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    [12] [12] XU C Q, YI T Y, LIU Y, et al. LET-dependent model of single-event effects in MOSFETs[J]. Journal of Computational Electronics, 2021, 20(4): 1496-1503.

    [13] [13] HIROSE K, SAITO H, KURODA Y, et al. SEU resistance in advanced SOI-SRAMs fabricated by commercial technology using a rad-hard circuit design[J]. IEEE Transactions on Nuclear Science, 2002, 49(6): 2965-2968.

    [14] [14] GADLAGE M J, GOUKER P, BHUVA B L, et al. Heavy-ion-induced digital single event transients in a 180 nm fully depleted SOI process[J]. IEEE Transactions on Nuclear Science, 2009, 56(6): 3483-3488.

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    [16] [16] DU S G, LIU H X, WANG S L. Sentaurus TCAD simulation of SET and Radiation-Hardened technology for FDSOI TFET devices[J]. Radiation Effects and Defects in Solids, 2023, 178(7-8): 885-897.

    [17] [17] BI J S, LIU G, LUO J J, et al. Numerical simulation of single-event-transient effects on ultra-thin-body fully-depleted silicon-on-insulator transistor based on 22 nm process node[J]. Acta Physica Sinica, 2013, 62(20): 208501.

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    HUNAG Kai, AIERKEN Abuduwayiti, BI Jinshun, LIU Xuefei, WANG Gang, LIU Mingqiang, WANG Degui. Simulation Study of Single-event Effects in 22 nm FDSOI Devices[J]. Microelectronics, 2025, 55(1): 78

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    Paper Information

    Special Issue:

    Received: Sep. 4, 2024

    Accepted: Jun. 19, 2025

    Published Online: Jun. 19, 2025

    The Author Email:

    DOI:10.13911/j.cnki.1004-3365.240304

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