Optoelectronic Technology, Volume. 44, Issue 1, 29(2024)

Implementation of "Low Slow Small" Object Detection System Based on FPGA

Chaoyang WANG, Changyuan FAN, and Nian JIANG
Author Affiliations
  • Electronic Engineering College,Chengdu University of Information Technology,Chengdu 610225,CHN
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    Figures & Tables(8)
    Block diagram of low slow small target detection system
    Physical diagram of system hardware
    Schematic of image data conversion circuit
    Flow chart of target detection algorithm implementation
    Effect diagrams of system implementation
    Detection diagrams of hovering target
    Target box selection error
    • Table 1. Comparison of target detection among various algorithms

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      Table 1. Comparison of target detection among various algorithms

      算法目标帧数完全框选部分框选错误框选准确率/(%)
      11006535065
      21008201882
      310010000100
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    Chaoyang WANG, Changyuan FAN, Nian JIANG. Implementation of "Low Slow Small" Object Detection System Based on FPGA[J]. Optoelectronic Technology, 2024, 44(1): 29

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    Paper Information

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    Received: Aug. 28, 2023

    Accepted: --

    Published Online: Jul. 18, 2024

    The Author Email:

    DOI:10.12450/j.gdzjs.202401006

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