Optoelectronic Technology, Volume. 44, Issue 1, 29(2024)

Implementation of "Low Slow Small" Object Detection System Based on FPGA

Chaoyang WANG, Changyuan FAN, and Nian JIANG
Author Affiliations
  • Electronic Engineering College,Chengdu University of Information Technology,Chengdu 610225,CHN
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    To address the challenges associated with the detection of low, slow, and small (LSS) targets, a low, slow, and small target detection system based on Field Programmable Gate Array (FPGA) has been developed. This system employed a COMS camera for image acquisition, DDR3 SDRAM for video frame buffering, and utilized FPGA to process algorithms combining inter-frame differencing and optical flow. The results of target detection were presented using the VGA standard. Test outcomes verified the system's capability to detect and real-time display low, slow, and small unmanned aerial vehicle (UAV) targets in hovering and low-speed flight postures.

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    Chaoyang WANG, Changyuan FAN, Nian JIANG. Implementation of "Low Slow Small" Object Detection System Based on FPGA[J]. Optoelectronic Technology, 2024, 44(1): 29

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    Paper Information

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    Received: Aug. 28, 2023

    Accepted: --

    Published Online: Jul. 18, 2024

    The Author Email:

    DOI:10.12450/j.gdzjs.202401006

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