Fig. 1. Structure of two kinds of SBDs (a) shallow trench isolation SBD, (b) polysilicon gate separation SBD

Fig. 2. The three-dimensional structure and two-dimensional profile of polysilicon gate separation SBD

Fig. 3. Simulation result of the effect of l₂ and l₃ on resistance and capacitance (a) capacitance curve, (b) resistance curve

Fig. 4. Chip physical photo and the SBD plane diagram

Fig. 5. Measured R_S and C₀ for the 8 cells Schottky barrier diode

Fig. 6. Changes in ratio of F_T with l₂ and l₃

Fig. 7. Photographs of the detector package box and the Chip

Fig. 8. Imaging test system (a) the 220 GHz imaging test setup, (b) the photo of 220 GHz imaging platform

Fig. 9. Imaging results of liquid level in a ceramic bottles