Chinese Journal of Liquid Crystals and Displays, Volume. 40, Issue 4, 655(2025)

Intelligent event recognition time-expanded memory measure based on high speed camera and FPGA implementation

Hailong XU1,2, Chao WANG3, and Haijiang SUN1,2、*
Author Affiliations
  • 1Changchun Institute of Optics,Fine Mechanics and Physics,Chinese Academy of Sciences,Changchun 130033,China
  • 2University of Chinese Academy of Sciences,Beijing 100049,China
  • 3Military Representative Office of Equipment Department of Aerospace System Department in Changchun,Changchun 130000,China
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    References(13)

    [1] SUN S H. Research on key technology of mass data transmission and storage for high speed camera based on Camera Link[D](2023).

    [2] ZHANG P. Research on acquisition, display and storage system of a high frame rate camera[D](2020).

    [3] ZHANG T R, ZHU J G, SONG Y G et al. Design and realization of high-speed dynamic image target recognition algorithm[J]. Computer Measurement & Control, 30, 229-236(2022).

    [4] LIU R Q, LI F, JIANG Y et al. Design of real-time target recognition system based on FPGA[J]. Computer Measurement & Control, 30, 56-59(2022).

    [5] CHEN M. Discuss the advantages and application of FPGA technology[J]. Electronics World, 199-200(2015).

    [7] HUANG M Z, LI B H. Design and implementation of dynamic frame difference method based on FPGA[J]. Optical Technique, 49, 231-237(2023).

    [8] WEN F, WANG L Q, ZHANG K H. Moving target detection by frame difference method based on ZYNQ acceleration[J]. Microcontrollers & Embedded Systems, 22, 74-78(2022).

    [10] LIU X, JIN X H. Algorithm for object detection and tracking combined on four inter-frame difference and optical flow methods[J]. Photoelectric Engineering, 45, 170665(2018).

    [11] YUAN Y Q, HE G J, WANG G Z et al. A background subtraction and frame subtraction combined method for moving vehicle detection in satellite video data[J]. Journal of University of Chinese Academy of Sciences, 35, 50-58(2018).

    [13] CAO Z K, SANG H S. DDR3 high-speed image cache strategy based on FPGA[J]. Information & Communications, 23-26(2020).

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    Hailong XU, Chao WANG, Haijiang SUN. Intelligent event recognition time-expanded memory measure based on high speed camera and FPGA implementation[J]. Chinese Journal of Liquid Crystals and Displays, 2025, 40(4): 655

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    Paper Information

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    Received: Aug. 21, 2024

    Accepted: --

    Published Online: May. 21, 2025

    The Author Email: Haijiang SUN (sunhaijing@126.com)

    DOI:10.37188/CJLCD.2024-0241

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