In order to extend the shooting time of high-speed camera without increasing the size and cost of high-speed camera, a parallel computing intelligent event recognition time-expanded storage method is designed and verified under the strong hardware constraints such as small storage resources of integrated high-speed camera. FPGA is used as the main control chip to realize the time-extended storage of video frame data and effectively extend the shooting time of high-speed camera. Firstly, the principle of double-ring gray scale difference algorithm is introduced and the performance of the algorithm to capture the target is analyzed. According to the location information of the target captured by the algorithm, the image data is segmented and stored, and the stored variable area is deleted from the non-variable area. When output high-speed camera shoots video, the image of the previous frame repeats the non-variable area and the current frame changes the image into a complete video frame image data. Secondly, an AXI_DMA module is designed to reduce the hardware resource consumption of FPGA board. The hardware resource consumption is about 75% less than that of VDMA IP, which can efficiently transmit data with DDR3. Finally, the method is implemented by FPGA board and the feasibility of the method is verified. Experimental results show that the proposed method can effectively identify targets in high-speed video frame data and segment and store them, and can effectively identify targets of 50×50 size, save 47% of storage resources in 2 560×1 440 video, and effectively improve the shooting time of high-speed camera.