Journal of Semiconductors, Volume. 46, Issue 3, 032201(2025)

A 0.0012-mm2 0.66-pJ/bit BPSK demodulator incorporating a loop-filter-less PLL achieving the maximum data rate of fcarrier/2

Xinyu Shen1,2, Zhao Zhang1,2、*, Jie Yang3, Jian Liu1,2, Nanjian Wu1,2, Mohamad Sawan3, and Liyuan Liu1,2
Author Affiliations
  • 1State Key Laboratory of Superlattices and Microstructures, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100049, China
  • 2Center of Materials Science and Optoelectronics Engineering, University of Chinese Academy of Sciences, Beijing 100049, China
  • 3CenBRAIN Neurotech, School of Engineering, Westlake University, Hangzhou 310024, China
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    Xinyu Shen, Zhao Zhang, Jie Yang, Jian Liu, Nanjian Wu, Mohamad Sawan, Liyuan Liu. A 0.0012-mm2 0.66-pJ/bit BPSK demodulator incorporating a loop-filter-less PLL achieving the maximum data rate of fcarrier/2[J]. Journal of Semiconductors, 2025, 46(3): 032201

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    Paper Information

    Category: Research Articles

    Received: Oct. 14, 2024

    Accepted: --

    Published Online: Apr. 27, 2025

    The Author Email: Zhao Zhang (ZZhang)

    DOI:10.1088/1674-4926/24100022

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