Journal of Semiconductors, Volume. 46, Issue 3, 032201(2025)

A 0.0012-mm2 0.66-pJ/bit BPSK demodulator incorporating a loop-filter-less PLL achieving the maximum data rate of fcarrier/2

Xinyu Shen1,2, Zhao Zhang1,2、*, Jie Yang3, Jian Liu1,2, Nanjian Wu1,2, Mohamad Sawan3, and Liyuan Liu1,2
Author Affiliations
  • 1State Key Laboratory of Superlattices and Microstructures, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100049, China
  • 2Center of Materials Science and Optoelectronics Engineering, University of Chinese Academy of Sciences, Beijing 100049, China
  • 3CenBRAIN Neurotech, School of Engineering, Westlake University, Hangzhou 310024, China
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    Figures & Tables(12)
    (Color online) Simplified block diagram of the WPDT system.
    (Color online) Block diagram of the proposed BPSK demodulator.
    (Color online) Schematics of (a) prior XOR-PLL, and (b) proposed LPF-Less PLL.
    (Color online) Simulated timing of the LPF-Less PLL.
    (Color online) Simulated timing of the LPF-Less PLL with input phase transition.
    Schematics of (a) TS, (b) EAC, (c) TD, and (d) CDR.
    (Color online) Operation process: (a) DRMAX = 0, (b) DRMAX = 1.
    (Color online) Simulation at the data rate of (fcarrier/8) with high-Q coils: (a) DRMAX = 1, (b) DRMAX = 0.
    (Color online) Chip photograph with the core layout of the BPSK demodulator.
    (Color online) Measurement results at the maximum data rate 6.78 Mb/s.
    (Color online) Measurement with high-Q coils: (a) setup, (b) results at 1.695 Mb/s.
    • Table 1. Performance summary and comparison.

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      Table 1. Performance summary and comparison.

      ParametersThis workAPCCAS'22[7]OJCAS'21[8]JSSC'18[6]JSSC'15[9]SSCL'20[10]ISCAS'13[11]BioCAS'14[16]
      TypeLPF-Less-PLLBasedPLL-BasedPLL-BasedPLL-BasedPLL-BasedPLL-LessPLL-LessPLL-Less
      Process (nm)4040180180130180180180
      High-Q telemetryYESYESYESYESYESNONONO
      Data rate (Mb/s)6.780.84752.260.2111.312513.56110
      fcarrier (MHz)13.5613.5613.5613.562113.56210
      (Data rate)/fcarrier1/21/161/61/641/1611/21
      Power (μW)4.4731.654817.4217200012.28277.9
      Energy efficiency(pJ/bit)0.6637.353621028.441523.80.9827.79
      Supply voltage (V)0.60.71.82.01.20.91.81.8
      Core area (mm2)0.00120.0040.150.137NA0.00380.0350.0035
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    Xinyu Shen, Zhao Zhang, Jie Yang, Jian Liu, Nanjian Wu, Mohamad Sawan, Liyuan Liu. A 0.0012-mm2 0.66-pJ/bit BPSK demodulator incorporating a loop-filter-less PLL achieving the maximum data rate of fcarrier/2[J]. Journal of Semiconductors, 2025, 46(3): 032201

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    Paper Information

    Category: Research Articles

    Received: Oct. 14, 2024

    Accepted: --

    Published Online: Apr. 27, 2025

    The Author Email: Zhao Zhang (ZZhang)

    DOI:10.1088/1674-4926/24100022

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