The working principle of a nanosecond-level high-voltage pulse generation circuit based on a Drift Step Recovery Diode (DSRD) is introduced. The circuit is modeled, and the key circuit parameters that affect the pulse output characteristics are discussed based on the model. In the experiment, a high-voltage Silicon Carbide (SiC) DSRD device developed in the author's laboratory is employed to generate a nanosecond-level pulse voltage with a peak value of 2.27 kV and a rise time of 1.846 ns on a standard load of 50 Ω. By changing the key parameters in the circuit, the variation trends of the pulse voltage peak obtained from the tests are consistent with the analysis from the model, which validates the rationality of the model. Considering the voltage overshoot issue at the drain-source terminals of the switch during the turn-off process, a buffer capacitor is connected in parallel across the drain-source terminals. The parameters of the buffer capacitor are adjusted experimentally to reduce the overshoot voltage at the drain-source terminals without affecting the peak voltage of the DSRD pulse discharge.