NUCLEAR TECHNIQUES, Volume. 45, Issue 11, 110402(2022)

Design of a TDC chip based on 0.18 μm SMIC technology

Yichao MA1, Liangyi WANG1, Haiyun TENG2、*, and Junguo JIANG1
Author Affiliations
  • 1Shaanxi University of Science & Technology, Xi'an 710021, China
  • 2Institute of High Energy Physics, Chinese Academy of Sciences, Dongguan 523000, China
  • show less
    References(18)

    [1] ZHAO Jie, ZHAO Ye, TONG Jiyun et al. A design of multi-channel time-to-digital converter for TOF lidar[J]. Semiconductor Optoelectronics, 42, 342-347(2021).

    [2] WU Zhong. Research and design of TOF pixel circuit for single photon LiDAR detector[D](2020).

    [3] YUE Zhuang, LIU Jun, SUN Xiangming et al. A TDC design based on two-step counting clock[J]. Electronic Design Engineering, 29, 7-12(2021).

    [4] WANG Lei, GUO Tangyong, PANG Cong. A TDC design method by improved counting method[J]. Journal of Geodesy and Geodynamics, 37, 987-990(2017).

    [5] LI Yu. Research on a time measurement method for PET[D](2021).

    [6] GE Da, LIANG Futian, WANG Xinzhe et al. Design and test of time-interpolation TDC based on 0.13 μm CMOS process[J]. Nuclear Techniques, 41, 040401(2018).

    [7] LANG Zijian. Research of high event rate and high resolution TDC ASIC prototype for silicon pixel detectors[D](2021).

    [8] HE Xiaoxuan. Research on precision time interval measurement technology based on FPGA[D](2018).

    [9] Russo S, Petra N, de Caro D et al. A 41 ps ASIC time-to-digital converter for physics experiments[J]. Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, 659, 422-427(2011).

    [10] WEI Yuqin, KONG Jie, YANG Haibo et al. Design and realization of high precision time-interval measurement based on FPGA[J]. Atomic Energy Science and Technology, 51, 1893-1897(2017).

    [11] YIN Jun, NI Fafu, ZHANG Jianchuan et al. Design and realization of time measurement based on FPGA and GPS[J]. Atomic Energy Science and Technology, 53, 151-157(2019).

    [12] Cheng Z, Zheng X Q, Deen M J et al. Recent developments and design challenges of high-performance ring oscillator CMOS time-to-digital converters[J]. IEEE Transactions on Electron Devices, 63, 235-251(2016).

    [13] WEI Lingfeng, ZHOU Rong, YANG Chaowen. Design and realization of the ICF neutron time-of-flight measurement circuit[J]. Nuclear Techniques, 38, 070403(2015).

    [14] ZHOU Guofei, YANG Hong. Structure design of time-to-digital converter based on interconnect interpolation[J]. Nuclear Techniques, 43, 070401(2020).

    [15] Yu J J, Dai F F, Jaeger R C. A 12-bit vernier ring time-to-digital converter in 0.13 μm CMOS technology[C], 232-233(2009).

    [16] AN Qi. Review of methods and techniques of precise time interval measurements for particle physics experiments[J]. Nuclear Techniques, 29, 453-462(2006).

    [17] LAN Songfu. Research on delay-locked loop based TDC ASIC in 180 nm CMOS[D](2021).

    [18] Machado R, Cabral J, Alves F S. Recent developments and challenges in FPGA-based time-to-digital converters[J]. IEEE Transactions on Instrumentation and Measurement, 68, 4205-4221(2019).

    Tools

    Get Citation

    Copy Citation Text

    Yichao MA, Liangyi WANG, Haiyun TENG, Junguo JIANG. Design of a TDC chip based on 0.18 μm SMIC technology[J]. NUCLEAR TECHNIQUES, 2022, 45(11): 110402

    Download Citation

    EndNote(RIS)BibTexPlain Text
    Save article for my favorites
    Paper Information

    Category: Research Articles

    Received: Jun. 7, 2022

    Accepted: --

    Published Online: Nov. 25, 2022

    The Author Email: TENG Haiyun (tenghy@ihep.ac.cn)

    DOI:10.11889/j.0253-3219.2022.hjs.45.110402

    Topics