Journal of Semiconductors, Volume. 45, Issue 5, 052303(2024)
The study of lithographic variation in resistive random access memory
Fig. 1. (Color online) Illustration of RRAM device at (a) switched on state and (b) switched off state.
Fig. 2. (Color online) The overall lithography physical verification methodology for RRAM devices.
Fig. 3. (Color online) The definition of RRAM device length and RRAM device spacing in an RRAM array layout. The number of rows and number of columns are M and N, respectively.
Fig. 4. (Color online) Waveforms for evaluation. (a) The concept of apply voltage across TE and BE and (b) the change of read resistance during SET and RESET processes. (c) An example of simulated I−V curve of RRAM device during SET and RESET processes.
Fig. 5. (Color online) Post lithography simulation layout. (a) Simulation result of 32 × 32 array and (b) the zoomed in view of lower left 3 × 3 corner.
Fig. 6. (Color online) Device area under different doses and focuses.
Fig. 12. (Color online) Effect of RRAM device length on (a)−(c) Ron, (d)−(f) Roff, (g)−(i) Vrst and Vset. The device spacing is 95 nm.
Fig. 13. (Color online) Effect of RRAM device spacing on (a)−(c) Ron, (d)−(f) Roff, (g)−(i) Vrst and Vset. The device length is 115 nm.
Fig. 14. (Color online) Effect of array's size on (a)−(c) Ron, (d)−(f) Roff, (g)−(i) Vrst and Vset. The device length and device spacing are 110 and 95 nm, respectively. From left to right: typical corner, max. corner, and min. corner.
Fig. 15. (Color online) The relationship between RRAM device spacing and (a) average device area and (b) variation with and without the OPC technique applied.
Fig. 16. (Color online) (a) RRAM patterns on the mask before and after the OPC technique is applied. (b) The printed RRAM patterns when the short circuit forms.
Fig. 17. (Color online) Comparison of (a)−(c) Ron and (d)−(f) Roff with and without the OPC technique applied.
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Yuhang Zhang, Guanghui He, Feng Zhang, Yongfu Li, Guoxing Wang. The study of lithographic variation in resistive random access memory[J]. Journal of Semiconductors, 2024, 45(5): 052303
Category: Articles
Received: Dec. 13, 2023
Accepted: --
Published Online: Jul. 8, 2024
The Author Email: Li Yongfu (YFLi)