Fig. 1. Structure diagram of DPMZM bias voltage closed-loop control

Fig. 2. Transmission curve of single MZM

Fig. 3. Relationship between phase difference and dithering amplitude of disturbance signal loaded on I/Q channel

Fig. 4. RF signal loaded on I/Q channel

Fig. 5. Simulation results of the second harmonic power value of pilot signal changing with P channel bias voltage. (a) Overall; (b) local

Fig. 6. Simulation results of the first harmonic power value of pilot signal changing withI channel bias voltage. (a) Overall; (b) local

Fig. 7. Flow chart of QPSK bias control algorithm

Fig. 8. Rough sweeping process of QPSK bias control I/Q branch

Fig. 9. Block diagram of multi-modulator-format compatible transmitter system

Fig. 10. Test block diagram of multi-modulator-format compatible system

Fig. 11. Emission performance test. (a) QPSK (5.0 Gbit/s); (b) BPSK (2.5 Gbit/s); (c) OOK (2.5 Gbit/s)

Fig. 12. 5 Gbit/s QPSK signal communication error rate-sensitivity test

Fig. 13. Thermal vacuum test performance test (9 h). (a) Thermal vacuum test; (b) test result

Fig. 14. Block diagram of simulated space environment test

Fig. 15. Simulated satellite communication BER test results. (a) 8 dB jitter; (b) 14 dB jitter