Fig. 1. (Color online) Typical product performance of 600 V class super junction MOSFET for 25 years.

Fig. 2. (Color online) (a) Structure of SJ and electric field dissertation along the avalanche breakdown path; three-dimensional distribution of bulk electric field in (b) SJ and non-SJ (c) devices.

Fig. 3. (Color online) R-well distribution and R_on,min of SJ.

Fig. 4. (Color online) Avalanche breakdown path and its electric field of 3-D SJ.

Fig. 5. (Color online) Double R-well distributions of 3-D SJ.

Fig. 6. (Color online) R_on,sp versus W functions of SJ.

Fig. 7. (Color online) R-well distribution a of SiC SJ.

Fig. 8. (Color online) Typical structures of SJ IGBT with (a) P-pillar connected to P-body and (b) P-pillar separated from P-body can achieve lower turn-off losses under different SJ doping concentrations. Reproduced with permission from Refs. [25, 26].

Fig. 9. (Color online) (a) Structure and (b) SEM of SJ IGBT with ultra-thin wafer thickness; compared with thin SJ-IGBT both at 650 A/cm² and at room temperature, the on-state voltage of the ultrathin SJ-IGBT could be decreased by about 160 mV, turn-off energy loss could be decreased by 22%. Reproduced with permission from Ref. [26].

Fig. 10. (Color online) Super-Q devices. (a) Concept and (b) SEM picture. Reproduced with permission from Ref. [28].

Fig. 11. (Color online) Integrated SJ device with optimized ES.

Fig. 12. (Color online) Integrated sub-micron SJ device; a measured low R_on,sp of 27.8 mΩ· cm² was observed under a V_B of 622.6 V.

Fig. 13. (Color online) (a) SiC SJ based on deep trend etching and tilted implantation. (b) The experiment verifies that the device achieves a R_on,sp of 80 mΩ·cm² while withstanding a V_B of 1200 V. Reproduced with permission from Ref. [39].

Fig. 14. SiC SJ based on multiple epitaxy and repeated implantations. A 1.2 kV-class superjunction (SJ) UMOSFET was realized using a multi-epitaxial growth method. Reproduced with permission from Ref. [40].

Fig. 15. (Color online) Deep trench etching and epitaxial filling process for SiC SJ. The measured R_on,sp of a 7.8 kV SJ MOSFET was 17.8 mΩ·cm², which is less than half the R_on,sp of the state-of-the-art 6.5 kV-class SiC MOSFET with an n-type drift layer. Reproduced with permission from Ref. [43].

Fig. 16. (Color online) (a) Schematic view and (b) SEM of SiC charge-balanced (CB) MOSFET. Reproduced with permission from Ref. [44].

Fig. 17. (Color online) GaN SJ with multiple current paths. It has been reported that GaN SJ has achieved a R_on,sp reduction to 100.8 mΩ·cm² at a V_B of 12.5 kV.

Fig. 18. (Color online) Vertical GaN SJ device structure. (a) SJ GaN diode; (b) SJ high electron mobility transistor. Reproduced with permission from Ref. [58, 59].

Fig. 19. (Color online) SEM image of vertical GaN SJ device. (a) Side-view SEM images of GaN pillars; (b) cross-section FIB-SEM images of the SJ region. GaN SJ-PNDs on GaN and sapphire both show a V_B of 1100 V, with the R_on,sp extracted to be mΩ·cm. Reproduced with permission from Ref. [60].

Fig. 20. (Color online) HOF structure and electric field. (a) Schematic structure; (b) 3D electric field distribution.

Fig. 21. (Color online) New structures of HOF devices; (a) S-HOF device; (b) C-HOF device; (c) M-HOF device; it has been demonstrated experimentally that the M-HOF device achieved a R_on,sp of only 15.5 mΩ·cm² at a breakdown voltage V_B of 436 V.

Fig. 22. (Color online) Dielectric termination technology; continuous MIS trenchs are introduced at the terminal curvature junction, which intercepts the electric field lines directed towards the region with smaller curvature.

Fig. 23. (Color online) Measured results of HOF devices. (a) V_B and R_on,sp as functions of D_n. (b) On-state I_d versus V_d curves.

Fig. 24. (Color online) (a) VDMOS with high-K dielectric. (b) Two-dimensional electric field vector distribution. Reproduced with permission from Ref. [68].

Fig. 25. (a) Mechanism of high-K device. (b) Hexagonal cell structure of high-K device. Reproduced with permission from Ref. [69, 70].

Fig. 26. (Color online) Discrete high-K devices. (a) High-K dielectric UMOS structure with a low-resistance channel. (b) High-K trench gate IGBT.

Fig. 27. (Color online) Integrated high-K devices. (a) PLDMOS. (b) Three-gate LDMOS. (c) SJ LDMOS. (d) Trench-type LDMOS.

Fig. 28. (Color online) A comparison of the performance of current SJ devices.

Fig. 29. (Color online) Prospects of SJ.