Fig. 1. Diagram of the four-port balanced doubler prototype and related harmonic currents^［10］.

Fig. 2. Diagram of the face-to-face balanced tripler architecture

Fig. 3. （a）Corss section view of the diode junction，（b）3D-view of the diode

Fig. 4. Measured diode I-V curves (a) and C-V curves (b) at different temperature levels.

Fig. 5. (a)The extracted&fitted temperature-dependent series resistance; (b)ideality factor and saturation current.

Fig. 6. (a) Cross section views diodes mounted in the cavity，(b) The main diagonal terms in the calculated thermal resistance matrix，(c) Predicted anode temperatures as a function of dissipated power

Fig. 7. (a) Details of the fabricated 220 GHz four-port balanced doubler module，(b) Impedance matching in the four-port and conventional circuit，(c) Photograph of the conventional doubler

Fig. 8. (a) Performance of the traditional doubler，(b) Output powers and efficiencies of the four-port circuits under different bias.

Fig. 9. (a) Comparison of these two modules at the same DPID，(b) Comparison of these two modules as a function of input power