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Acta Optica Sinica, Volume. 45, Issue 14, 1420017(2025)

Design of Silicon‐based Optical Logic Gate Using Particle Swarm Optimization Algorithm (Invited)

Chen Lin1, Run Sun2, Kejia Wang1, Qing Zhou1, Hongwei Chen2、**, and Xu Liu1、*
Author Affiliations
  • 1School of Electronic Science & Engineering, Southeast University, Nanjing 210096, Jiangsu , China
  • 2Department of Electronic Engineering, Tsinghua University, Beijing 100084, China
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    AbstractGet PDF(in Chinese)
    Figures&Tables (23)
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    References (34)
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    Figures & Tables(23)
    Schematic of optical logic gate architecture based on variable-length etching slots

    Fig. 1. Schematic of optical logic gate architecture based on variable-length etching slots

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    Schematic diagram of optical logic gates

    Fig. 2. Schematic diagram of optical logic gates

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    Schematic diagram of optical logic gate structure based on SOI platform

    Fig. 3. Schematic diagram of optical logic gate structure based on SOI platform

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    The design process of optical logic gates based on PSO algorithm

    Fig. 4. The design process of optical logic gates based on PSO algorithm

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    Schematic of the geometrical structures of three logic gates. (a) OR logic gate; (b) AND logic gate; (c) XOR logic gate

    Fig. 5. Schematic of the geometrical structures of three logic gates. (a) OR logic gate; (b) AND logic gate; (c) XOR logic gate

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    Light field distributions of the logic gate at a wavelength of 1550 nm under four different input conditions. (a) Input 00; (b) input 01; (c) input 10; (d) input 11

    Fig. 6. Light field distributions of the logic gate at a wavelength of 1550 nm under four different input conditions. (a) Input 00; (b) input 01; (c) input 10; (d) input 11

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    Contrast curves of the OR logic gate under four input conditions in the wavelength range of 1530‒1570 nm

    Fig. 7. Contrast curves of the OR logic gate under four input conditions in the wavelength range of 1530‒1570 nm

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    Light field distribution of the logic gate at a wavelength of 1550 nm under four different input conditions. (a) Input 00;

    Fig. 8. Light field distribution of the logic gate at a wavelength of 1550 nm under four different input conditions. (a) Input 00;

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    Contrast curves of the AND logic gate under four input conditions in the wavelength range of 1530‒1570 nm

    Fig. 9. Contrast curves of the AND logic gate under four input conditions in the wavelength range of 1530‒1570 nm

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    Light field distribution of the logic gate at a wavelength of 1550 nm under four different input conditions. (a) Input 00;

    Fig. 10. Light field distribution of the logic gate at a wavelength of 1550 nm under four different input conditions. (a) Input 00;

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    Contrast curves of the XOR logic gate under four input conditions in the wavelength range of 1530‒1570 nm

    Fig. 11. Contrast curves of the XOR logic gate under four input conditions in the wavelength range of 1530‒1570 nm

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    Fabrication layout of the chip

    Fig. 12. Fabrication layout of the chip

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    SEM images of three types of logic gates. (a) OR logic gate; (b) AND logic gate; (c) XOR logic gate

    Fig. 13. SEM images of three types of logic gates. (a) OR logic gate; (b) AND logic gate; (c) XOR logic gate

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    Fabrication tolerance analysis of three logic gates. (a) OR logic gate; (b) AND logic gate; (c) XOR logic gate

    Fig. 14. Fabrication tolerance analysis of three logic gates. (a) OR logic gate; (b) AND logic gate; (c) XOR logic gate

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    Insertion loss diagrams of OR optical logic gate. (a) Input1 excitation; (b) input2 excitation; (c) input3 excitation

    Fig. 15. Insertion loss diagrams of OR optical logic gate. (a) Input1 excitation; (b) input2 excitation; (c) input3 excitation

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    Insertion loss diagrams of AND optical logic gate. (a) Input1 excitation; (b) input2 excitation; (c) input3 excitation

    Fig. 16. Insertion loss diagrams of AND optical logic gate. (a) Input1 excitation; (b) input2 excitation; (c) input3 excitation

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    Insertion loss diagrams of XOR optical logic gate. (a) Input1 excitation; (b) input2 excitation; (c) input3 excitation

    Fig. 17. Insertion loss diagrams of XOR optical logic gate. (a) Input1 excitation; (b) input2 excitation; (c) input3 excitation

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    • Table 1. Truth table of OR logic gate

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      Table 1. Truth table of OR logic gate

      In-1BiasIn-2

      Operation

      result

      		Out-1Out-2
      0（0°）1（180°）0（0°）010
      0（0°）1（180°）1（180°）101
      1（180°）1（180°）0（0°）101
      1（180°）1（180°）1（180°）101

    • Table 2. Truth table of AND logic gate

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      Table 2. Truth table of AND logic gate

      In-1BiasIn-2Operation resultOut-1Out-2
      0（0°）1（180°）0（0°）010
      0（0°）1（180°）1（180°）010
      1（180°）1（180°）0（0°）010
      1（180°）1（180°）1（180°）101

    • Table 3. Truth table of XOR logic gate

      View table

      Table 3. Truth table of XOR logic gate

      In-1BiasIn-2Operation resultOut-1Out-2
      0（0°）1（180°）0（0°）010
      0（0°）1（180°）1（180°）101
      1（180°）1（180°）0（0°）101
      1（180°）1（180°）1（180°）010

    • Table 4. Performance comparison between the designed optical OR gate and OR gates reported in other literatures

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      Table 4. Performance comparison between the designed optical OR gate and OR gates reported in other literatures

      Design

      Wavelength /

      nm

      Size /

      μm2

      CR /

      dB

      		Ref.
      Plasmonic waveguides8006.69［26］
      Photonic crystals15508412.5［27］
      Photonic crystals1550636.617［28］
      Si photonics platform13305.0165.78［29］
      Si photonics platform1550815.7Our work

    • Table 5. Performance comparison between the designed optical AND gate and AND gates reported in other literatures

      View table

      Table 5. Performance comparison between the designed optical AND gate and AND gates reported in other literatures

      Design

      Wavelength /

      nm

      Size /

      μm2

      CR /

      dB

      		Ref.
      Si photonics platform15501.443.98［16］
      Plasmonic waveguides8556.14［26］
      Photonic crystals1550842.71［27］
      Photonic crystals1550838.55［30］
      Si photonics platform1550815.6Our work

    • Table 6. Performance comparison between the designed optical XOR gate and XOR gates reported in other literatures

      View table

      Table 6. Performance comparison between the designed optical XOR gate and XOR gates reported in other literatures

      Design

      Wavelength /

      nm

      Size /

      μm2

      CR /

      dB

      		Ref.
      Photonic crystals15508412.9［27］
      Photonic crystals1550157.39.14［31］
      Si photonics platform1550816.3Our work
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    Chen Lin, Run Sun, Kejia Wang, Qing Zhou, Hongwei Chen, Xu Liu. Design of Silicon‐based Optical Logic Gate Using Particle Swarm Optimization Algorithm (Invited)[J]. Acta Optica Sinica, 2025, 45(14): 1420017

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    Paper Information

    Category: Optics in Computing

    Received: Apr. 16, 2025

    Accepted: Jun. 30, 2025

    Published Online: Jul. 16, 2025

    The Author Email: Hongwei Chen (chenhw@tsinghua.edu.cn), Xu Liu (liuare@seu.edu.cn)

    DOI:10.3788/AOS250944

    CSTR:32393.14.AOS250944

    Topics

    laser devices and laser physics
    Lasers and Laser Optics
    Laser physics
    laser manufacturing
    Instrumentation, Measurement and Metrology