The 4H-SiC samples with different surface residual stress states were obtained by lapping. The residual stress on the sample surface was measured by a laser Raman spectrometer, and the indentation hardness of the sample surface without and with electric field was measured by a microhardness tester. The results show that, compared to the state with no residual stress, the sample surface indentation hardness increases by up to 9.5% under a residual stress state ranging from -1.6 GPa to 0 GPa. After a certain current is applied to the sample, the indentation hardness of the sample surface with no residual stress can be reduced by about 6%, and the indentation hardness of the sample surface with residual stress can be reduced by about 13%. The surface indentation hardness of 4H-SiC with different residual stress ranging from -1.6 GPa to 1.6 GPa was simulated by finite element analysis. It is found that the residual tensile stress in the range of 0 GPa to 1.6 GPa can reduce the indentation hardness of the wafer surface by up to 5.8%. The mapping relationship between the residual stress, electric field, and the indentation hardness of 4H-SiC surface is obtained, providing a theoretical basis for reducing the surface hardness of the workpiece by regulating the residual stress and applying an electric field.