Acta Optica Sinica, Volume. 45, Issue 17, 1720004(2025)
Integrated Optoelectronic Equalization Architecture and Chip Design for Data Center (Invited)
Fig. 1. Optical path compensation based on fiber optic components. (a)(b) Cross-sections and refractive index distribution diagrams of double-clad passive fibers (DCF) and erbium-doped fiber (EDF)[12]; (c) intensity distributions of six irregular Bragg fibers (IBFs) along the fiber radius[13]
Fig. 2. High-speed signal transmission equalization method based on FFE. (a) Schematic of FFE; (b) fractionally spaced equalization method based on FFE[21]; (c) experimental setup of PAM4 transmission system based on FFE[22]; (d) parallelized FFE equalization method with multiple reconstructions[23]
Fig. 3. DFE principle and its application. (a) Principle diagram of DFE[30]; (b) experiment flowchart of DFE equalization method based on complex-DFE[29]; (c) block diagrams of DFE with soft-decision decoding algorithm[27]
Fig. 4. VNLE principle and its application. (a) Structure diagram of 3rd-order VNLE, solid lines represent the second-order nonlinear terms of the Volterra series, and dotted lines represent the third-order nonlinear terms of the Volterra series; (b) comparison of computational complexity among Volterra technical solutions at different memory depths[26]; (c) experimental setup of PAM4 transmission system for simplifying the second-order Volterra equalization scheme[26]; (d) Volterra equalization scheme based on low-level quantization calculation[31]; (e) comparison of bit error rates of different equalization methods under transmission distances of 20 km and 30 km[32]
Fig. 5. Different neural network equalization methods. (a) Schematic diagram of equalization algorithm for fully connected neural networks introducing the decision feedback structure[33]; (b) equalizer structure based on feedforward neural networks[34]; (c) single-step and multi-step equalization flowcharts based on long short-term memory networks[35]; (d)(e) comparison of bit error rates of different neural network equalization methods under transmission distances of 15 km and 25 km[36]
Fig. 6. Optical neural network channel equalization method. (a) Experimental setup based on integrated optical reservoir computing[39]; (b) experimental setup based on nonlinear vector autoregression using integrated micro-ring modulator[42]
Fig. 7. 32-node photonic reservoir computing chip. (a) Chip layout; (b) packaged chip
Fig. 8. Real-time equalization experiment of nonlinear damage. (a) Schematic diagram of experimental device; (b) eye diagram of damage signal; (c) diagrams of original signal, damage signal, and equalized signal; (d) eye diagram of equalized signal
Fig. 9. On-chip schematic diagram of single-node highly nonlinear modulated photonic reservoir architecture
Fig. 10. Nonlinear channel equalization task based on a single-node highly nonlinear modulated photonic reservoir chip. (a) Illustration of the post-processing equalization method; (b) equalization rendering with signal-to-noise ratio of 12 dB; (c) bit error rate under different signal-to-noise ratios
Fig. 11. Prediction task for time series data[48]. (a) Experimental schematic diagram of waveguide-type photonic reservoir for time series prediction; (b) prediction curves for FTSE in test-dataset period
Fig. 12. Modulation format recognition task[50]. (a) Experimental schematic diagram of waveguide-type photonic reservoir for modulation format recognition; (b) recognition accuracy curves for our work and other studies; (c) confusion matrix at optical signal-to-noise ratio is 18 dB
|
Get Citation
Copy Citation Text
Li Pei, Baoqin Ding, Jianshuai Wang, Bing Bai. Integrated Optoelectronic Equalization Architecture and Chip Design for Data Center (Invited)[J]. Acta Optica Sinica, 2025, 45(17): 1720004
Category: Optics in Computing
Received: Jun. 3, 2025
Accepted: Jun. 25, 2025
Published Online: Sep. 3, 2025
The Author Email: Li Pei (lipei@bjtu.edu.cn)
CSTR:32393.14.AOS251198