Microelectronics, Volume. 52, Issue 4, 572(2022)

Design of a Four-Quadrant 14-bit Multiplying D/A Converter

LEI Langcheng, LUO Yanxin, LIU Honghong, DU Yubin, GAO Weiqi, ZHANG Jun, WU Qiuxia, and FU Dongbing
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    References(3)

    [1] [1] KESTER W. Data conversion handbook [M]. Boston: Elsevier, 2004.

    [2] [2] MARCHE D, SAVARIA Y. Modeling R-2R segmented-ladder DACs [J]. IEEE Trans Circ Syst, 2010, 57(1): 31-43.

    [3] [3] HOLLOWAY P, NORTON M. A high-yield second-generation 10-bit monolithic DAC [C]// ISSCC. Philadelphia, PA, USA. 1976: 106-107.

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    LEI Langcheng, LUO Yanxin, LIU Honghong, DU Yubin, GAO Weiqi, ZHANG Jun, WU Qiuxia, FU Dongbing. Design of a Four-Quadrant 14-bit Multiplying D/A Converter[J]. Microelectronics, 2022, 52(4): 572

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    Paper Information

    Special Issue:

    Received: Mar. 30, 2022

    Accepted: --

    Published Online: Jan. 18, 2023

    The Author Email:

    DOI:10.13911/j.cnki.1004-3365.220109

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