Fig. 1. Flow chart of spatio-temporal domain video denoising algorithm

Fig. 2. DOG filter result of one frame

Fig. 3. Flow chart of domain division filtering in time domain

Fig. 4. Filtering results of DOG

Fig. 5. Hardware architecture of denoising algorithm in this paper

Fig. 6. Cameralink decodes data

Fig. 7. IP core of HLS module

Fig. 8. Schematic diagram of convolution filter window

Fig. 9. IP core of FDMA

Fig. 10. Packet data flow

Fig. 11. Hardware platform of denoising algorithm in this paper

Fig. 12. Denoising results of software and hardware of proposed algorithm and denoising results of different algorithms

Fig. 13. Resource occupancy