[5] [5] Ye J, Stewart E, Zhang D, et al. Integration of multiple sensors for noncontact rail profile measurement and inspection[J]. IEEE Transactions on Instrumentation and Measurement, 2021, 70: 1-12.

[9] [9] Jeevan B, Bhatt C N, Krishna C V, et al. FPGA implementation of secure image compression with 2D-DCT using Verilog HDL[C]//2014 2nd International Conference on Devices, Circuits and Systems (ICDCS). IEEE, 2014: 1-4.

[12] [12] Bscones D, Gonzlez C, Mozos D. An FPGA accelerator for real - time lossy compression of hyperspectral images[J]. Remote Sensing, 2020, 12(16): 2563.

[15] [15] Nakahara H, Que Z, Luk W. High-throughput convolutional neural network on an FPGA by customized JPEG compression[C]//2020 IEEE 28th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM). IEEE, 2020: 1-9.

[16] [16] Carneiro C A, Garcia F P, Freitas H C, et al. Scalable spatio - temporal parallel parameterizable stream - based JPEG-LS encoder[J]. IEICE Electronics Express, 2017, 14(2): 20160950.

[17] [17] Chen L, Yan L, Sang H, et al. High-throughput architecture for both lossless and near-lossless compression modes of LOCO-I algorithm[J]. IEEE Transactions on Circuits and Systems for Video Technology, 2018, 29(12): 3754-3764.

[19] [19] Liu F, Chenid X, Liaoid Z, et al. Adaptive Pipeline Hardware Architecture Design and Implementation for Image Lossless Compression/Decompression Based on JPEG-LS[J]. IEEE Access, 2024, 85(11): 1025-1034.

[20] [20] Nayar R, Balasubramanian P, Maskell D L. Image Compression using Approximate Addition[C]//TENCON 2021-2021 IEEE Region 10 Conference (TENCON). IEEE, 2021: 01-06.