Photonics Research, Volume. 12, Issue 4, 755(2024)
On-chip spiking neural networks based on add-drop ring microresonators and electrically reconfigurable phase-change material photonic switches
Fig. 1. Core structure of the proposed on-chip silicon-based computational primitive. (a) Schematic representation of the TLIF neuron system, comprising an ADRMR-based synaptic neuron array, a photodetector (PD), an electronic module, a WDM optical source, a beam of probe continuous light, an output neural spike, and an electrically reconfigurable GST photonic switch. Real-time multiwavelength weighted spikes generated by the ADRMR-based synaptic neuron array are guided into the PD and then enter the electrical module for processing. Activation of the electrically reconfigurable GST photonic switch occurs upon reaching a predefined threshold of cumulative power from the weighted spikes. This activation leads to the continuous detection of light at the switch output, subsequently triggering an output neural spike and a reset pulse. (b) Two types of ADRMRs: add-drop microring resonator and photonic crystal add-drop ring resonator. (c) Electrically reconfigurable GST photonic switches with an ITO heater and a graphene heater, respectively.
Fig. 2. (a) All-optical ADRMR-based synaptic neuron. (b)–(d) Self-pulsation behavior, excitability behavior, and synaptic plasticity of (from left to right) (b) the microdisk, (c) the add-drop microring, and (d) the photonic crystal add-drop ring resonator.
Fig. 3. (a1) and (b1) The add-drop microring-based output spikes after amplification as inputs to an electrically reconfigurable optical switching model employing an ITO heater. (c1) The photonic crystal-based output spikes after amplification as inputs to an electrically reconfigurable optical switching model employing a graphene heater. (a2), (b2), and (c2) represent the transient temperature response in the scenarios (a1), (b1), and (c1), respectively. (a3), (b3), and (c3) illustrate the temperature distribution at the end of a spike during the amorphization process for (a1), (b1), and (c1), respectively.
Fig. 4. Dynamics of the TLIF neuron system. (a) The TLIF computational primitives undergo three sequential phases: the heating and cooling phase, the firing phase, and the reset phase. (b) Schematic representation of thermal leakage and integration dynamics when exposed to external pulse inputs. In this diagram, “I” symbolizes the integration process, and “L” represents the leakage process.
Fig. 5. Normalized electrical field profile and the complex effective index (
Fig. 6. Scaling architecture for the SNNs based on TLIF neuron systems. (a) The overall SNNs structure comprises an input layer, an output layer, and multiple hidden layers. Each of these layers consists of a collector gathering the information from the previous layer, and a splitter that splits the signal equally to individual TLIF neuron systems. Each TLIF neuron system has electrically reconfigurable GST photonic switches to calculate the weighted sum of the inputs, which decides whether an output pulse is generated. (b) A four-layer fully connected SNN consisting of the proposed TLIF neuron systems.
Fig. 7. (a1) and (a2) Schematic illustrating the fitting process of normalized LIF neurons with varying
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Qiang Zhang, Ning Jiang, Yiqun Zhang, Anran Li, Huanhuan Xiong, Gang Hu, Yongsheng Cao, Kun Qiu, "On-chip spiking neural networks based on add-drop ring microresonators and electrically reconfigurable phase-change material photonic switches," Photonics Res. 12, 755 (2024)
Category: Silicon Photonics
Received: Sep. 29, 2023
Accepted: Feb. 8, 2024
Published Online: Mar. 29, 2024
The Author Email: Ning Jiang (uestc_nj@uestc.edu.cn)
CSTR:32188.14.PRJ.507178