[1] [1] YANG Kai. Inspection for Wheel Tread Scratches [D]. Chengdu：Southwest Jiaotong University，2005：20-24.

[2] [2] LIN Yao，YU Tuo-hua. The Design and Implementation of Telecommunication System for Railway Based on FPGA [J]. China Railway，2008，6(5)：41-44.

[3] [3] FENG Zhi-hui，LIU En-hai，YUE Yong-jian. FPGA Delay-line Interpolation Method for Laser Range Finding [J]. Opto-Electronic Engineering，2010，37(4)：53-58.

[4] [4] TONG Zi-quan，JIA Jun. High Speed Data Acquisition System Designed by FPGA [J]. Foreign Electronic Measurement Technology，2008，27(12)：30-32.

[5] [5] WANG Cheng，WU Ji-hua，FAN Li-zhen，et al. Design of Altera FPGA/CPLD [M]. Beijing：People’s Telephone and Postal Press，2005.

[6] [6] WU Zi-xin，ZHANG Si-zhong. Asynchronous FIFO Structure and it’s FPGA Design [J]. Microcontrollers & Embedded System，2000(3)：20-22.

[7] [7] WAN Yao，LI Xiao-qing，ZHOU Yun-fei，et al. Design of Multi-Channel Data Acquisition System Based on FPGA [J]. Control and Automation，2007，23(5)：30-32.

[8] [8] ZHAO Hong-mei，MI Qi-chao. Design of Multi-Channel Data Acquisition System Based on DSP and FPGA [J]. Control and Automation，2007，23(26)：25-28.

[9] [9] ZHU Hua-zheng，FAN Da-peng，MA Dong-xi，et al. Design of the Digital Control System for Seeker Based on Dual DSP [J]. Opto-Electronic Engineering，2009，36(6)：4-9.

[10] [10] PIAO Xian-lei，XIONG Ji-jun，SHEN San-min. High Speed Data Acquisition System Based on FPGA [J]. Control and Automation，2008，24(2)：20-22.

[11] [11] MU Hong-de，WANG Jun-feng，SHI Tie-lin. Design and Implementation of Interface Between DSP and High Precision A/D Converter AD7864 [J]. Control and Automation，2006，22(8)：15-17.