Fig. 1. Distribution chip framework

Fig. 2. Distribution chip pin diagram

Fig. 3. Simulation diagram of constant current drive

Fig. 4. Timing relationship of pins

Fig. 5. Circuit diagram of shift register

Fig. 6. Circuit diagram of receiving module

Fig. 7. Simulation result of receiving module

Fig. 8. Circuit diagram of storage interception module

Fig. 9. RAM circuit diagram

Fig. 10. Storage intercept module simulation

Fig. 11. Circuit diagram of output module

Fig. 12. Output module simulation

Fig. 13. Active crystal oscillator circuit

Fig. 14. Phase locked loop circuit

Fig. 15. Phase locked loop frequency multiplication and division circuit

Fig. 16. Area report

Fig. 17. Power report

Fig. 18. Distribution chip layout

Fig. 19. Distribution chip internal standard unit

Fig. 20. LVS verification

Fig. 21. Distribute chip emulation diagram