Fig. 1. RMP coil power topology of DⅢ-D tokamak

Fig. 2. RMP coil power output structure

Fig. 3. Diagram of fourth order linear active disturbance rejection

Fig. 4. Closed-loop Bode diagram of power system under different conditions不同情况下的电源系统闭环伯德图

Fig. 5. Different frequency perturbations are simulated at the DC bus

Fig. 6. Simulate load side mutation

Fig. 7. Simulated sensor measurement error at output