Journal of Terahertz Science and Electronic Information Technology , Volume. 23, Issue 4, 340(2025)

Design of high-accuracy and megabit True-Time Delay chip

CHEN Yueying, LIU Shuai, YANG Liu, and ZHAO Zirun
Author Affiliations
  • The 13th Research Institute of CETC, Shijiazhuang Hebei 050051, China
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    References(3)

    [8] [8] MONDAL I, KRISHNAPURA N. A 2 GHz bandwidth, 0.25~1.7 ns true-time-delay element using a variable-order all-pass filter architecture in 0.13 m CMOS[J]. IEEE Journal of Solid-State Circuits, 2017, 52(8): 2180-2193. DOI: 10.1109/JSSC.2017.2693229.

    [9] [9] GARAKOUI S K, KLUMPERINK E A M, NAUTA B, et al. Compact cascadable g(m)-C all-pass true time delay cell with reduced delay variation over frequency[J]. IEEE Journal of Solid-state Circuits, 2015, 50(3): 693-703. DOI: 10.1109/JSSC.2015.2390214.

    [10] [10] HU F, MOUTHAAN K. A 1~20 GHz 400 ps true-time delay with small delay error in 0.13 m CMOS for broadband phased array antennas[C]//2015 IEEE MTT-S International Microwave Symposium. Phoenix, AZ, USA: IEEE, 2015: 1-3. doi: 10.1109/MWSYM.2015.7166834.

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    CHEN Yueying, LIU Shuai, YANG Liu, ZHAO Zirun. Design of high-accuracy and megabit True-Time Delay chip[J]. Journal of Terahertz Science and Electronic Information Technology , 2025, 23(4): 340

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    Paper Information

    Category:

    Received: Oct. 26, 2024

    Accepted: May. 29, 2025

    Published Online: May. 29, 2025

    The Author Email:

    DOI:10.11805/tkyda2024573

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