Compared to traditional electronic devices, silicon-based optoelectronic devices have larger information capacities, lower exchange latencies, and larger transmission bandwidths. Thus, they are expected to solve the problems caused by the rapid growth in global network capacity caused by the emergence of new generation information technologies such as the Internet of Things, cloud computing, and big data since the beginning of the 21st century. Polarization beam splitters are important devices for implementing polarization insensitive photonic integrated circuits, while traditional silicon-based polarization beam splitters typically have larger dimensions but cannot be integrated compactly on a chip. The introduction of subwavelength structures makes it possible to miniaturize silicon optoelectronic devices. The design of subwavelength devices is usually based on physical intuition in forward design and computer optimization in reverse design. The reverse design of subwavelength devices allows for the free optimization of the shape of metasurfaces, with greater degrees of freedom and the ability to obtain very fine structures. However, most existing research on designing subwavelength structures using inverse design methods requires high computational power and low diversity. Our previous proposal of using a two-dimensional code metasurface silicon polarization beam splitter based on a gradient index to theoretically analyze the gradient refractive index physical model effectively prevents the solutions from being trapped in local optimums and eliminates the uncertainty resulting from the sensitivity to the stochastic initial values. This design method has the characteristics of low dependence on the computational power, high design freedom, and great optimization potential. Although the error tolerance is considered in the design process, there are various forms of errors in actual processing. Thus, there are high requirements for fabricating. It is necessary to optimize processing methods such as electron beam lithography (EBL) and inductively coupled plasma etching (ICP) to improve fabrication. Strict control of the EBL exposure accuracy, etching depth, sidewall roughness, and steepness is required during the fabrication process. This article shows how a device is manufactured and tested using a silicon optical testing platform. The theory of the physical constraint inverse design of metasurface silicon optical devices and the corresponding integrated polarization beam splitter design are experimentally verified on a silicon-on-insulator (SOI) platform.

We optimized methods such as EBL and ICP to meet the fabrication requirements for metasurface polarization beam splitters. We optimized the scanning field, exposure beam current, and other parameters of EBL. We obtained good exposure results using an photoresist consisting of HSQ and MIBK with volume fraction ratio of 1∶2. The exposure linewidth error did not exceed 5 nm, and the metasurface exposure morphology was good, meeting the design requirements. The etching formula was also optimized, and after optimization, the edge roughness and steepness of the etching were both good (Fig. 3). After optimizing the process, a silicon metasurface polarization beam splitter was manufactured. First, the metasurface structure was exposed using a 180 nm thick photoresist and developed using a 25% TMAH solution at 50 ℃ for 1 min. Then, the optimized etching formula was used for etching to a depth of 120 nm. Finally, the photoresist was removed with a 2% HF solution. Two overlay marks needed to be exposed simultaneously with the metasurface structure for the overlay exposure. For the second exposure, a 500 nm thick HSQ photoresist was spun on the SOI. Then, the waveguide layer structure was exposed. After development, the top silicon of the SOI was etched to the bottom, and the photoresist was removed with the HF solution. After the fabrication of the metasurface polarization beam splitter structure, a grating coupler for testing was fabricated using the PMMA photoresist, with an etching depth of 70 nm.

An SEM image (Fig. 5) shows that the final fabricated metasurface structure has a linewidth error of less than 5 nm and an etching error of less than 10 nm. Although the morphology after etching is slightly worse than that before etching, it still meets the design requirements. The fabricated metasurface polarization beam splitter is tested using the constructed silicon optical testing platform (Fig. 6), and the test results are normalized (Fig. 7). In the range of 1510?1590 nm, the extinction ratios of the TE and TM modes exceed 20 dB. The insertion losses of the TE and TM modes are less than 3.8 dB and 3.9 dB, respectively. At the center wavelength, the extinction ratios of the TE and TM modes are approximately 20 dB and 25 dB, respectively. The testing and simulation errors may be caused by machining errors as regards the metasurface etching uniformity, etching steepness, and metasurface morphology.

A metasurface silicon polarizing beam splitter designed based on a gradient index physical model is prepared using micro- and nano-processing methods such as EBL and ICP on an SOI platform. The fabrication process is optimized to meet the manufacturing requirements of the metasurface device. The size error of the metasurface structural features of the prepared device is less than 5 nm, and the etching depth error is less than 10 nm. Finally, actual testing conducted using the constructed silicon optical probe platform shows that within the wavelength range of 1510?1590 nm covering the C-band, the TE and TM mode insertion losses are less than 3.9 dB and 3.8 dB, respectively, and the extinction ratios are greater than 20 dB. The fabricated metasurface polarization beam splitter has good extinction ratios and acceptable insertion losses in the wavelength range of 1510?1590 nm. The experimental results verify the theory of the physical constraint inverse design of metasurface silicon optical devices and the corresponding design conclusions regarding integrated polarization beam splitters. The difference between the experimental and simulation results may be due to processing errors. In subsequent work, the micro- and nano-processing technologies for metasurface silicon optical devices can be further optimized.