Chinese Journal of Liquid Crystals and Displays, Volume. 39, Issue 10, 1341(2024)

Design and implementation of piecewise approximation bilateral filtering algorithm based on FPGA

Shiyu LIU1,2, Xiadong ZHAO1, Pan WEN2, Longlong CHEN2, Xifeng LI2、*, and Jianhua ZHANG2
Author Affiliations
  • 1School of Microelectronics,Shanghai University,Shanghai 201800,China
  • 2Key Laboratory of Advanced Display and System Applications of Ministry of Education,Shanghai University,Shanghai 200072,China
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    Figures & Tables(9)
    Bilateral filtering algorithm[8]
    Range domain piecewise approximation.(a)Curve of similar values with ΔI for different σr;(b)Piecewise approximate at σr=75.
    Spatial kernel and piecewise approximate with different σr.(a)5×5 spatial kernel;(b)σr=15;(c)σr=30;(d)σr=45;(e)σr=60;(f)σr=75.
    Hardware architecture diagram of algorithm
    Vivado simulation result.(a)Data processing started;(b)Data processing completed.
    Variation of PSNR(a)and SSIM(b)with σr at different σn
    Comparison of filtering effect between MATLAB and FPGA.(a)Original images;(b)Noise images;(c)MATLAB processing;(d)FPGA processing;(e)~(h)Enlarged images.
    • Table 1. Comparison of the PSNR and SSIM between MATLAB and hardware simulation

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      Table 1. Comparison of the PSNR and SSIM between MATLAB and hardware simulation

      σn/σr噪声图PSNR/SSIM滤波图PSNR/SSIM(MATLAB)滤波图PSNR/SSIM(FPGA)PSNR的误差百分比/%SSIM的误差百分比/%
      5/1534.130 7/0.835 537.417 9/0.926 236.933 5/0.920 11.290.66
      10/3028.115 7/0.602 633.460 2/0.853 133.149 1/0.848 30.930.56
      15/4524.601 8/0.448 630.923 9/0.774 630.393 1/0.769 21.720.70
      20/6022.180 7/0.354 929.029 4/0.698 328.931 6/0.689 80.341.22
      25/7520.275 5/0.290 627.431 6/0.629 426.638 6/0.618 82.891.68
      30/9018.740 3/0.242 626.089 8/0.561 725.534 2/0.552 32.131.67
    • Table 2. Hardware implementation and comparison of algorithms

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      Table 2. Hardware implementation and comparison of algorithms

      方法平台核大小LUTDSP寄存器功耗/W
      文献[14Virtex-55×55 142361 782-
      文献[19Zynq-70005×52 487322 5870.122
      文献[20Sparten-75×37 310-7 0461.3
      传统方法Zynq-70005×52 181459440.125
      本文方法Zynq-70005×51 966131 1780.128
      Sparten-75×51 972131 1780.124
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    Shiyu LIU, Xiadong ZHAO, Pan WEN, Longlong CHEN, Xifeng LI, Jianhua ZHANG. Design and implementation of piecewise approximation bilateral filtering algorithm based on FPGA[J]. Chinese Journal of Liquid Crystals and Displays, 2024, 39(10): 1341

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    Paper Information

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    Received: Apr. 17, 2024

    Accepted: --

    Published Online: Nov. 13, 2024

    The Author Email: Xifeng LI (lixifeng@shu.edu.cn)

    DOI:10.37188/CJLCD.2024-0126

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