Fig. 1. Classification of optical logic calculations. (a) Three paradigms for all-optical logic computing; (b) three paradigms for electro-optical logic computing

Fig. 2. Implementation principle of all-optical logic computing. (a) Implementation scheme based on linear optical effects; (b) implementation scheme of nonlinear optical effects based on non-parametric processes; (c) implementation scheme of nonlinear optical effects based on parametric processes

Fig. 3. Paradigms for all-optical logic computing based on linear optical effects. (a) All-optical logic gates based on lensless shadow casting method; (b) all-optical logic gates based on spatial light modulators^[60]; (c) all-optical logic gates based on diffractive neural networks^[67]; (d) all-optical logic gates based on photonic crystal waveguides^[70]; (e) all-optical logic gates based on nanoscale plasma slot waveguides^[69]; (f) all-optical logic gates based on thermally tuned Mach-Zehnder interference array^[72]

Fig. 4. Paradigms for all-optical logic computing based on nonlinear optical effects. (a) All-optical logic gates based on XGM^[76]; (b) all-optical logic gates based on TPA^[82]; (c) all-optical logic gates based on SRS^[85]; (d) all-optical logic gates based on PPLN^[103]; (e) all-optical logic gates based on FWM^[98]; (f) all-optical logic gates based on SPM/XPM^[88]

Fig. 5. Implementation principle of electro-optical logic computing. (a) Implementation scheme based on thermo-optical effect; (b) implementation scheme based on electro-optical effect; (c) implementation scheme based on PCM

Fig. 6. Various electro-optical logic computing paradigms. (a) Implementation scheme based on metal heater^[113]; (b) implementation scheme based on doped silicon heater^[118]; (c) implementation scheme of graphene heater^[123]; (d) implementation scheme based on plasma dispersion effect^[127]; (e) implementation scheme based on the Pockles effect^[138]; (f) implementation scheme based on 2D materials^[150]; (g) implementation scheme based on PCM^[145]

Fig. 7. Demonstration and application of 9 bit optical PLA^[32]. (a) 9-input PLA realized by combining the wavelength and spatial dimensions; (b) non-isotropic evolution, in which a single-cell pattern can create the Sierpinski triangle by two-dimensional cellular automaton

Fig. 8. Development path of improving the integration of photonics-electronics convergence computing and expanding the scale of application

Fig. 9. Future roadmap for optical logic computation