Efficient Very Large Scale Integration Architecture of Multi-Level Discrete Wavelet Transform

Table 1. PSNR results of original images and reconstructed images after 3-level DWT with precision of 16 bit
View table
Table 1. PSNR results of original images and reconstructed images after 3-level DWT with precision of 16 bit
Architecture PSNR /dB
Lena.jpg Lion.jpg Peppers.jpg Mandrill.jpg Fruits.jpg
Traditional 62.969 60.839 62.325 64.064 60.503
Proposed 62.889 60.768 62.319 63.043 60.362

Table 2. Comparison of overall hardware resources consumption among different architectures

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Table 2. Comparison of overall hardware resources consumption among different architectures

Architecture	Multiplier	Adder	Register	Input RAM (8 bit)	Temporal RAM (16 bit)	T_CPD	Throughput rate
Ref. [11]	12S	16S	20S+SN+4N	2SN	N²/4	4T_a	S/2T_a
Ref. [12]	9S	16S	20S	2SN	4N+N²/4	4T_a	S/2T_a
Ref. [16]	105S/8+6	21S+12	341S/8	N²	3N	3T_a	2S/3T_a
Ref. [17]	10	16	37	2N	4N+N²/4	2T_a	1/T_a
Proposed	15	24	127	3N	15N/2	2T_a	1/T_a

Table 3. Comparison of hardware efficiency among different architectures with N of 512 pixel

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Table 3. Comparison of hardware efficiency among different architectures with N of 512 pixel

Architecture	S	T_ACT	R_TC×10⁶	${T_{CPD}}_{}$ /ns	${R_{TDP}}_{}$ /(transistor·s)	Relative hardware efficiency improvement /%
Ref. [11]	8	21504	8.92	12.04	2309.46	80.4
Ref. [12]	8	21504	7.41	12.04	1918.50	76.4
Ref. [16]	8	16384	13.60	9.03	2005.90	77.4
Ref. [16]	16	8192	14.30	9.03	1057.82	57.1
Ref. [17]		172032	6.61	6.02	6845.50	93.4
Proposed		131072	0.575	6.02	453.71

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Pan Zhang, Wei Zhang. Efficient Very Large Scale Integration Architecture of Multi-Level Discrete Wavelet Transform[J]. Acta Optica Sinica, 2019, 39(4): 0412004

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Paper Information

Category: Instrumentation, Measurement and Metrology

Received: Nov. 3, 2018

Accepted: Dec. 12, 2018

Published Online: May. 10, 2019

The Author Email:

DOI:10.3788/AOS201939.0412004

Topics

laser devices and laser physics

Lasers and Laser Optics

Laser physics

laser manufacturing

Instrumentation, Measurement and Metrology

Table 1. PSNR results of original images and reconstructed images after 3-level DWT with precision of 16 bit

Table 1. PSNR results of original images and reconstructed images after 3-level DWT with precision of 16 bit

Table 2. Comparison of overall hardware resources consumption among different architectures

Table 2. Comparison of overall hardware resources consumption among different architectures

Table 3. Comparison of hardware efficiency among different architectures with N of 512 pixel

Table 3. Comparison of hardware efficiency among different architectures with N of 512 pixel