The integration of optoelectronics based on silicon has rapidly gained traction in recent years due to its unique benefits, such as compatibility with complementary metal-oxide-semiconductor technology and the ability to achieve extremely high levels of integration.1^,2 As a result, it has garnered widespread interest globally and led to the development of a variety of incredibly ultra-compact silicon photonic devices.3 One particular type of device that stands out as being highly promising and widely applicable is arrayed waveguide gratings (AWGs).4 Despite the ease with which ultra-small AWGs can be created using single-mode silicon photonic waveguides, which boast exceptionally high refractive index differences and diminutive cross-sectional dimensions, these AWG devices often suffer from substantial random phase errors, leading to severe channel crosstalk and elevated excess losses. Over the last two decades, researchers have made considerable strides in developing miniaturized yet high-performance AWG devices,5^–11 but achieving dense wavelength-division multiplexing (DWDM)-grade AWGs (with channel spacings of less than or equal to 1.6 nm) remains a daunting challenge, hindering their widespread adoption. In our prior work, we demonstrated a 16×16 AWG with a channel spacing of 1.6 nm by employing a groundbreaking design strategy that involved uniformly broadening the arrayed waveguides far beyond the single-mode condition.12 Due to this innovative approach, the crosstalk of the central channel was significantly reduced to as low as −31.7dB (a notable improvement of ∼10dB over earlier results). Significantly, this inventive technique did not necessitate any specialized processing steps, relying instead on straightforward single-etching methods that did not significantly contribute to excess loss or increased footprint sizes, underscoring its exceptional practical value and real-world applicability.

While significant progress has been made in realizing AWGs for DWDM applications, there remains a pressing need to push the boundaries of these technologies even further by developing devices capable of supporting channel spacings as narrow as 0.8 nm, or even 0.4 nm. This presents a formidable technical challenge, as the interchannel crosstalk tends to skyrocket under such conditions. For instance, an AWG router with a channel spacing of just 0.2 nm was demonstrated in Ref. 13, but suffered from unacceptably high interchannel crosstalk of approximately −4dB. In 2013, Pathak et al. employed this strategy by expanding the straight sections of their arrayed waveguides to 800 nm while maintaining the bent sections in a single-mode configuration to avoid higher-mode excitation and associated crosstalk issues.10 This technique has proven effective in enabling the realization of AWGs with relatively good performance characteristics. For example, the 0.8-nm-channel-spacing AWG device produced through advanced fabrication techniques10 exhibits an interchannel crosstalk of around −17dB. Regarding the excess loss in this specific type of AWG design, it was estimated to be ∼2.5dB. This level of attenuation was achieved through the introduction of shallowly etched transition regions between the free propagation regions (FPRs) and the arrayed waveguides. By implementing these features, it became possible to effectively minimize mode-mismatch losses while preserving the overall functionality and performance of the AWG architecture. However, there have been no reports to date of high-performance silicon-based AWG (de)multiplexers capable of operating with channel spacing as narrow as 0.4 nm, highlighting the ongoing challenges faced in this area of research.

In this paper, we present a compact silicon AWG incorporating Euler bend-assisted arrayed waveguides, with both straight and bent sections expanded to a width of up to 2μm. Previous research established that adopting broader photonic waveguides can significantly reduce random phase errors in optical interference systems, including Mach–Zehnder interferometers14 and AWGs.12 In addition, we have incorporated Euler bends with a gradient curvature design to minimize higher-order mode excitation and ensure low-loss monomode transmission for the fundamental modes. By leveraging these principles, we expect to dramatically decrease random phase errors stemming from fabrication imperfections, thereby reducing channel crosstalk, and improving fabrication tolerances. Furthermore, we have introduced shallowly etched transition regions (SETRs) to connect the arrayed waveguides to the FPRs, allowing us to keep mode-mismatch losses to a minimum. We demonstrate the effectiveness of this design approach through the realization of a 32×32 silicon AWG with a narrow channel spacing of 0.4 nm and a free spectral range (FSR) of 14.6 nm. The measured excess loss for the center channel is found to be 0.65 dB (from input port #17), with channel uniformity across all 32 output channels averaging around 2.5 dB. Importantly, interchannel crosstalk for the central channel is as low as −21.4dB (from input port #17). We believe that this AWG (de)multiplexer represents one of the most successful implementations in terms of performance among comparable silicon-based AWG devices.

Figure 1 shows a schematic configuration of the proposed silicon AWG, which includes input/output waveguides, two FPRs, two SETRs, and broadened arrayed waveguides with Euler bends. The device is optimized for a narrow channel spacing of 0.4 nm and supports up to 32 channels, consistent with the requirements for DWDM systems. Note that the present AWG is designed for TE polarization because silicon photonic waveguides are usually strongly polarization-dependent due to the ultrahigh birefringence. Nevertheless, introducing broadened arrayed waveguides is also effective for developing AWGs that work with TM polarization. Table 1 gives the key parameters of the present AWG design, including the central wavelength λ0=1550nm, the interference order m=80, the length difference ΔL=43.84μm, the FPR length LFPR=200μm, the pitch dg=1.6μm, and the separation do=1.84μm. With these parameters, the FSR of the AWG device is estimated to be ∼14.6nm, covering the full range of 32 channels as intended. In this implementation, the arrayed waveguides are intentionally broadened to 2μm to minimize random phase errors caused by manufacturing imperfections, thus improving the performance with low crosstalk, and enhancing the fabrication tolerances. Compared with the traditional AWG, whose arrayed waveguides are designed by following the single-mode condition, this present innovative design can significantly reduce the cumulative random phase error of the arrayed waveguides by as high as 100 times.12 In addition, Euler bend-assisted arrayed waveguides are employed to mitigate higher-order mode excitation and promote low-loss transmission of the fundamental mode. For this purpose, we employ a gradient curvature design, with maximum and minimum radii set to 2000 and 20μm, respectively, resulting in an effective radius of 37.1μm. In the wavelength range of 1500 to 1600 nm, the additional loss of the TE0 mode is <0.01dB, and the intermode crosstalk is <−27.1dB.12 In contrast, for ordinary arc bends with the same radius, serious multimode interference appears, greatly increasing the transmission loss and the intermode crosstalk. To minimize mode-mismatch losses, SETRs are strategically positioned to bridge the gap between the FPRs and the arrayed waveguides. These components play a crucial role in ensuring efficient coupling of light from the FPR to the fundamental mode in the arrayed waveguides. Further details on the design of the SETRs are given in the subsequent section.

Figures 1(b)–1(c) zoom in on the structure and layout of the SETR, which comprises two distinct segments: a shallowly etched region and a transition zone connecting this area to a deeply etched region. Within the shallowly etched region, we utilize varying widths along the ridge waveguide, controlled by parameters h1 (set at 220 nm) and h2 (set at 70 nm), defined by the manufacturing process. To minimize higher-order mode generation during the transition from the FPR to the arrayed waveguides, careful consideration must be given to selecting optimal values for w1, L1, and L2 in the first part of the SETR and the adiabatic taper connecting them. During this transitional stage, the width decreases gradually to match the width (w2=0.45μm) specified for arrayed waveguides, filtering out remaining higher-order modes. By carefully designing these geometric aspects of the transition zone, we can facilitate a smooth transfer of energy into the dominant mode of the arrayed waveguide and prevent unwanted modes from entering the system, contributing to enhanced signal quality and reduced crosstalk within the AWG architecture.

Figure 2(a) shows a simulation analysis for the dependence of the ratio of the TE0 mode coupled power at the FPR-to-SETR interface on the width w1, which is the initial width of the shallowly etched portion of the transition region. Here the central wavelength is 1.55μm. The simulation results show that the ratio of the TE0 mode coupled power increases proportionally with the width w1. Since the minimal gap between adjacent arrayed waveguides should be more than 200 nm (according to the fabrication requirements), we choose w1=1.4μm to achieve high coupling efficiency. Figures 2(b) and 2(c) demonstrate how the taper lengths L1 and L2 affect the coupling efficiency, revealing that the combination with L1=20μm and L2=30μm yields satisfactory performance and ensures compactness without energy leakage between neighboring waveguides.

Figure 3(a) shows the simulated light propagation throughout the FPR and the SETR portions of the designed AWG, while Fig. 3(b) shows more details about the part of the arrayed waveguides. It can be seen that the light propagation experiences low scattering and negligible excitation of higher-order modes. As a result, the designed SETR region works very well, as expected. Figure 3(c) shows the calculated coupling power ratios for all the individual arrayed waveguides, showing a Gaussian profile, as predicted theoretically. The total power carried by all the arrayed waveguides suggests that the excess loss from the SETR–FPR connection is ∼0.5dB. Furthermore, Fig. 3(d) reveals the power ratios of all the guided modes (TE0, TM0, TE1, TE2, and TM1), which shows that high-order modes are suppressed very well with a high extinction ratio of >25dB in the operating band of 1.5 to 1.6μm. Overall, these simulation results confirm the viability of the proposed design, and further efforts may be necessary to improve the performance if needed.

Figure 4(a) shows the numerically simulated spectral responses of the 32 channels in the designed AWG. It can be seen that the central channel exhibits a low excess loss of 0.69 dB and the channel nonuniformity is ∼2.5dB. The FSR is about 14.6 nm, which closely matches the theoretical predictions. The crosstalks between the adjacent and nonadjacent channels are less than −25 and −30dB for the central channels, respectively. In contrast, the adjacent channel crosstalk becomes approximately −20dB for the edge channels. Figures 4(b) and 4(c) show the light propagation in the FPR when the central channel with the wavelength of 1.552μm and the edge channel with the wavelength of 1.560μm are considered. One can see the focusing spots corresponding to the interference orders of m−1, m, and m+1, respectively. Particularly, for the edge channel shown in Fig. 4(c), the power is distributed at the orders of m−1 and m, which is the reason why the edge channel has a relatively high excess loss.

The AWG was fabricated with an electron beam lithography process and inductively coupled plasma dry-etching techniques on a silicon-on-insulator (SOI) wafer featuring a top silicon layer thickness of 220 nm and a 2-μm thick buried oxide layer. A 1.5-μm thick SiO2 layer was then added as an upper cladding layer. Figures 5(a)–5(c) show the microscopy images of the fabricated 32×32 AWG, highlighting the connection points between the FPR and the arrayed waveguides as well as input/outputs. Additional scanning electron microscopy (SEM) images provide close-up views of the SETR area and the tapers, as shown in Figs. 5(d) and 5(e). For the characterization of the fabricated device, the ASE light was coupled into the input ports via TE grating couplers, and the transmitted light was then analyzed using an optical spectrum analyzer after being collected by the single-mode fibers attached to the output ports. Figure 5(a) also shows the fabricated AWG chip with 32 input ports (i.e., I1 to I32) and 32 output ports (i.e., O1 to O32).

Figure 6(a) displays the measurement data obtained when the ASE light was injected into the central input port #17 of the fabricated 32×32 AWG, showing a uniform channel spacing of 0.4 nm and an FSR of 14.7 nm, which is consistent with the design expectation. Here, it was normalized with respect to the transmission of a 2-μm-wide straight waveguide with the same TE grating couplers on the same chip. All input (or output) grating couplers are located in the same column to ensure high uniformity for the fabrication and the fiber coupling. As shown in Figs. 6(b) and 6(c), the measured excess loss can be as low as ∼0.65dB, and the nonuniformity is 2.5 dB, reflecting the challenges posed by nonuniform far-field intensity patterns in the FPR of an AWG.15 The potential solution is using long FPRs or manipulating the far-field distribution carefully. The measured adjacent channel crosstalk is −21.4dB for the central output port (#17), while the measured adjacent channel crosstalk for the edge output port (#1) is −18.5dB. The measured 1- and 3-dB bandwidths are ∼0.13 and 0.21 nm, which also agree well with the simulation prediction. It can be seen that the fabricated AWG works very well, indicating that the present AWG design is excellent.

We have also measured transmissions from all the 32 output ports when light was launched from any one of the input ports (#1 to #32). It confirms the consistency with the predicted channel spacing of Δλch=0.4nm (corresponding to Δfch=50GHz at 1550 nm). The transmission from the central input port (#17) yields excellent performance, with low excess loss of only 0.65 dB, owing to the benefits of introducing broadened arrayed waveguides as well as SETRs. Due to the minor sidelobe, the performance degradation is observed when light is launched from the edge input ports (e.g., #32). The minor sidelobes can be removed by improving the fabrication as well as correcting the aberration of the Rowland circle design.16 Switching between different inputs highlights the characteristics of wavelength shifting, as expected for AWGs, and uniform channel spacing persists across the operational bandwidth regardless of input selection, providing the potential realization of cyclic AWG for different scenarios.

Table 2 shows the summary of the reported silicon AWGs with different channel spacings varying from 3.2 to 0.2 nm. Here, we show the measured results for the excess loss and the crosstalk of only the central input port for simplicity. Among them, our previous AWG with a channel spacing of 1.6 nm12 has shown the lowest crosstalk. When the channel spacing is reduced further, the AWG size increases greatly, and it becomes even more challenging to achieve high performance because the phase errors increase notably. For example, when the channel spacing is reduced to 0.8 nm, the crosstalk is as high as −17dB, and the excess loss is about 2.5 dB for the AWG demonstrated in Ref. 10. Currently, few results have been reported for AWGs with a 0.4-nm channel spacing, which is considered in this paper. From Table 2, it can be seen that the present AWG exhibits a low crosstalk of −21.4dB and very low excess losses of ∼0.65dB for the central channel, even with a narrow channel spacing of 0.4 nm, due to the design of Euler bend-assisted broadened arrayed waveguides and the introduction of SETRs. It is possible to further enhance the device performance by improving the fabrication processes and introducing high-quality SOI wafers with extreme thickness uniformity.

In summary, we have reported the design and demonstration of a high-performance 32×32 silicon AWG with a very narrow channel spacing of 0.4 nm, which is suitable for DWDM systems. Especially, the use of Euler bend-assisted broadened arrayed waveguides minimizes the phase errors and the power attenuation, and it also improves the manufacturing simplicity. We have introduced the design of SETRs to mitigate the excess loss related to the mode mismatch between the FPR and the arrayed waveguides. For the fabricated AWG with a footprint of 900μm×2200μm, the FSR is about 14.7 nm, covering the 32 channels with a spacing of 0.4 nm. For the central channel, the measured excess loss is as low as 0.65 dB, and the channel nonuniformity is about 2.5 dB, while the interchannel crosstalk is about −21.4dB, which is impressive for the case with a channel spacing as narrow as 0.4 nm. The performance of the present AWG can be improved in potential by improving the fabrication processes and introducing high-quality SOI wafers with extreme thickness uniformity. The present high-performing AWGs with dense channel spacing will be useful in various optical systems of, e.g., next-generation communication.

Xiaowan Shen is currently pursuing her PhD at the College of Optical Science and Engineering, Zhejiang University, Hangzhou, China. Her current research interests include arrayed waveguide grating and silicon photonics.

Weike Zhao is currently a postdoctoral fellow at the College of Optical Science and Engineering, Zhejiang University, Hangzhou, China. He received his PhD from the University of Electronic Science and Technology of China. His current research interests include multimode silicon photonics and nonlinear optics.

Huan Li is currently a professor at Zhejiang University, Hangzhou, China, and mainly works on silicon photonics. He has published several refereed international journal papers.

Daoxin Dai is currently the QIUSHI Distinguished Professor at Zhejiang University, Hangzhou, China, and mainly works on silicon photonics. He has published several refereed international journal papers. He was one of the most cited Chinese researchers from 2015 to 2021 (Elsevier).