Microelectronics, Volume. 51, Issue 4, 461(2021)

A 25 GHz Ultra-Wideband S/H Circuit Based on 013 μm SiGe BJT Process

YANG Xiaoyu1,2, WANG Yonglu2,3, and SUN Wei2,3
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  • 1[in Chinese]
  • 2[in Chinese]
  • 3[in Chinese]
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    References(2)

    [6] [6] HARPE P, ZANIKOPOULOS A, HEGT H, et al. Analog calibration of mismatches in an open-loop track-and-hold circuit for timeinterleaved ADCs [C] // Proc IEEE Int Sol Sta Circ Conf. San Francisco, CA, USA. 2007: 476-480.

    [7] [7] LIN L, REN J Y, YE F. A 1-GS/s 6-bit folding and interpolating ADC in 013 μm CMOS [J]. Analog Integr Circ Signal Process, 2009, 58(3): 71-76.

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    YANG Xiaoyu, WANG Yonglu, SUN Wei. A 25 GHz Ultra-Wideband S/H Circuit Based on 013 μm SiGe BJT Process[J]. Microelectronics, 2021, 51(4): 461

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    Paper Information

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    Received: Sep. 15, 2020

    Accepted: --

    Published Online: Feb. 21, 2022

    The Author Email:

    DOI:10.13911/j.cnki.1004-3365.200428

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