Fig. 1. Schematic of APD single-photon detection circuit, in which the illustration is the semiconductor structure of the Geiger-mode Si APD.

Fig. 2. (a) The waveform of the rising edge of the avalanche pulse; (b) the curve of the mean amplitude of the avalanche pulses with the bias voltage; (c) the time jitter of the APD single-photon detector.

Fig. 3. Schematic of temperature control and bias voltage compensation based on the FPGA board.

Fig. 4. The curve of the detection delay with the bias voltage of the Si APD.

Fig. 5. The delay drift as a function of the environment temperature from 16 ℃ to 36 ℃: (a) The delay drift before and after the compensation by the bias voltage; (b) the delay drift after the compensation by the bias voltage.

Fig. 6. Comparison diagram of time deviation of the APD single-photon detector before and after the compensation by the bias voltage.