This paper proposes a dual-loop digital-assisted analog low-dropout linear regulator (LDO) circuit architecture suitable for digital loads. The digital logic controller adopts a hybrid algorithm for segmentations and binary searches. When a transient event occurs, the digital loop control is mainly used to conduct quick searches and determine the number of power tube groups that are turned on, provide coarse current adjustment, and achieve a fast transient response. It then enters the steady state and mainly uses analog loop control to provide fine current adjustment to achieve high-precision DC voltage output. The proposed hybrid LDO is designed based on a 55 nm CMOS process, has a maximum load capacity of 52 mA, and the working clock of the digital logic controller is 50 MHz. The simulation results show that when the load current changes between 2–52 mA within 200 ns, the maximum overshoot voltage and overshoot voltage of the hybrid LDO circuit are 121 mV and 154 mV respectively, and the transient recovery time is <1 μs.